AMC_FMC_Carrier-PcbDoc.sch

EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A2 23386 16535
encoding utf-8
Sheet 1 25
Title "Marble-Mini"
Date "2020-09-25"
Rev "v1.1"
Comp "Michał Gąska / WUT"
Comment1 ""
Comment2 ""
Comment3 "Marble - TOP"
Comment4 ""
$EndDescr
$Sheet
S 8500 7950 1550 1550
U 5BD31F9F
F0 "FMC_2" 50
F1 "FMC_2.sch" 50
F2 "FMC2_GBTCLK0_M2C_P" O R 10050 8850 50 
F3 "FMC2_GBTCLK0_M2C_N" O R 10050 8950 50 
F4 "FMC2_CLK1_M2C_P" O R 10050 9100 50 
F5 "FMC2_CLK1_M2C_N" O R 10050 9200 50 
F6 "FMC2_CLK0_M2C_P" O R 10050 9350 50 
F7 "FMC2_CLK0_M2C_N" O R 10050 9450 50 
F8 "FMC2_PRSNT_M2C_L" O L 8500 8250 50 
F9 "I2C_FMC2_SCL" I L 8500 8350 50 
F10 "I2C_FMC2_SDA" B L 8500 8450 50 
F11 "FMC2_TCK" I L 8500 8600 50 
F12 "FMC2_TDI" I L 8500 8700 50 
F13 "FMC2_TDO" O L 8500 8800 50 
F14 "FMC2_TMS" I L 8500 8900 50 
F15 "FMC2_TRST" I L 8500 9000 50 
F16 "FMC2_PG_C2M" O L 8500 8150 50 
F17 "FMC2_FUSE" O L 8500 9100 50 
$EndSheet
$Sheet
S 14450 3600 1350 2200
U 5BD32060
F0 "SDRAM" 50
F1 "SDRAM.sch" 50
F2 "DDR3_BA[0..2]" B L 14450 3950 50 
F3 "DDR3_DQ[0..15]" B L 14450 4050 50 
F4 "DDR3_A[0..15]" B L 14450 4150 50 
F5 "DDR3_CK_P" B L 14450 4250 50 
F6 "DDR3_CK_N" B L 14450 4350 50 
F7 "DDR3_CKE" B L 14450 4450 50 
F8 "DDR3_CS" B L 14450 4550 50 
F9 "DDR3_LDM" B L 14450 4650 50 
F10 "DDR3_ODT" B L 14450 4750 50 
F11 "DDR3_RAS" B L 14450 4850 50 
F12 "DDR3_CAS" B L 14450 4950 50 
F13 "DDR3_WE" B L 14450 5050 50 
F14 "DDR3_RST_N" B L 14450 5150 50 
F15 "DDR3_UDM" B L 14450 5250 50 
F16 "DDR3_LDQS_P" B L 14450 5350 50 
F17 "DDR3_LDQS_N" B L 14450 5450 50 
F18 "DDR3_UDQS_P" B L 14450 5550 50 
F19 "DDR3_UDQS_N" B L 14450 5650 50 
F20 "PGOOD" B L 14450 3750 50 
$EndSheet
$Sheet
S 2850 3950 1200 1850
U 5BD320D5
F0 "AMC_connector" 50
F1 "AMC_connector.sch" 50
F2 "I2C_IPMB_SCL" I R 4050 5550 50 
F3 "I2C_IPMB_SDA" I R 4050 5650 50 
F4 "AMC_GA[0..2]" I R 4050 5400 50 
F5 "AMC_En" I R 4050 5750 50 
F6 "Rx0_P" I R 4050 4400 50 
F7 "Rx0_N" I R 4050 4300 50 
F8 "Tx0_P" I R 4050 4150 50 
F9 "Tx0_N" I R 4050 4050 50 
F10 "FCLKA_N" O R 4050 4600 50 
F11 "FCLKA_P" O R 4050 4700 50 
F12 "TCLKA_P" O R 4050 4850 50 
F13 "TCLKA_N" O R 4050 4950 50 
F14 "Rx18_P" O R 4050 5100 50 
F15 "Rx18_N" O R 4050 5200 50 
$EndSheet
$Sheet
S 8550 12250 1200 950 
U 5BABAC65
F0 "SFP1" 50
F1 "SFP1.sch" 50
F2 "SFP_1_RX_P" O R 9750 12300 50 
F3 "SFP_1_RX_N" O R 9750 12400 50 
F4 "SFP_1_TX_P" I R 9750 12500 50 
F5 "SFP_1_TX_N" I R 9750 12600 50 
F6 "I2C_SFP1_SDA" B L 8550 12750 50 
F7 "I2C_SFP1_SCL" I L 8550 12850 50 
F8 "SFP1_TX_DIS" O R 9750 12800 50 
F9 "SFP1_TX_FAULT" O R 9750 13000 50 
F10 "SFP1_DEF0" O R 9750 13100 50 
F11 "SFP1_LOS" O R 9750 12900 50 
F12 "SFP1_RS" O R 9750 12700 50 
$EndSheet
$Sheet
S 14200 7150 1450 950 
U 5BCEDA2C
F0 "PMOD" 50
F1 "PMOD.sch" 50
F2 "Pmod1_[0..7]" B L 14200 7550 50 
F3 "Pmod2_[0..7]" B L 14200 7750 50 
F4 "Pmod3_[0..7]" B L 14200 7950 50 
$EndSheet
$Sheet
S 5100 12900 1700 1700
U 5BCEDA3D
F0 "I2C_MUX" 50
F1 "I2C_MUX.sch" 50
F2 "I2C_FPGA_SDA" B L 5100 13000 50 
F3 "I2C_FPGA_SCL" I L 5100 13100 50 
F4 "I2C_FPGA_SW_RST" I L 5100 13200 50 
F5 "I2C_APP_SDA" B L 5100 13450 50 
F6 "I2C_APP_SCL" O L 5100 13550 50 
F7 "I2C_SFP1_SDA" B R 6800 13700 50 
F8 "I2C_SFP1_SCL" O R 6800 13800 50 
F9 "I2C_SFP2_SDA" B R 6800 13950 50 
F10 "I2C_SFP2_SCL" O R 6800 14050 50 
F11 "I2C_SFP3_SDA" B R 6800 14200 50 
F12 "I2C_SFP3_SCL" O R 6800 14300 50 
F13 "I2C_SFP4_SDA" B R 6800 14450 50 
F14 "I2C_SFP4_SCL" O R 6800 14550 50 
F15 "I2C_FMC1_SCL" O R 6800 13000 50 
F16 "I2C_FMC1_SDA" B R 6800 13100 50 
F17 "I2C_FMC2_SCL" O R 6800 13250 50 
F18 "I2C_FMC2_SDA" B R 6800 13350 50 
F19 "I2C_HDMI_SCL" O R 6800 13500 50 
F20 "I2C_HDMI_SDA" B R 6800 13600 50 
$EndSheet
Wire Wire Line
	14450 4650 12950 4650
Wire Wire Line
	14450 4750 12950 4750
Wire Wire Line
	14450 4850 12950 4850
Wire Wire Line
	14450 4950 12950 4950
Wire Wire Line
	14450 5050 12950 5050
Wire Wire Line
	14450 5150 12950 5150
Wire Wire Line
	14450 5250 12950 5250
Wire Wire Line
	14450 5350 12950 5350
Wire Wire Line
	14450 5450 12950 5450
Wire Wire Line
	14450 5550 12950 5550
Wire Wire Line
	14450 5650 12950 5650
$Sheet
S 8550 13400 1200 950 
U 5CC393D3
F0 "SFP2" 50
F1 "SFP2.sch" 50
F2 "SFP_2_RX_P" O R 9750 13450 50 
F3 "SFP_2_RX_N" O R 9750 13550 50 
F4 "SFP_2_TX_P" I R 9750 13650 50 
F5 "SFP_2_TX_N" I R 9750 13750 50 
F6 "I2C_SFP2_SDA" B L 8550 13900 50 
F7 "I2C_SFP2_SCL" I L 8550 14000 50 
F8 "SFP2_TX_DIS" O R 9750 13950 50 
F9 "SFP2_TX_FAULT" O R 9750 14150 50 
F10 "SFP2_DEF0" O R 9750 14250 50 
F11 "SFP2_LOS" O R 9750 14050 50 
F12 "SFP2_RS" O R 9750 13850 50 
$EndSheet
$Sheet
S 14450 12250 1200 950 
U 5CC6DBF7
F0 "SFP3" 50
F1 "SFP3.sch" 50
F2 "SFP_3_RX_P" O L 14450 12300 50 
F3 "SFP_3_RX_N" O L 14450 12400 50 
F4 "SFP_3_TX_P" I L 14450 12500 50 
F5 "SFP_3_TX_N" I L 14450 12600 50 
F6 "I2C_SFP3_SDA" B R 15650 12750 50 
F7 "I2C_SFP3_SCL" I R 15650 12850 50 
F8 "SFP3_TX_DIS" O L 14450 12800 50 
F9 "SFP3_TX_FAULT" O L 14450 13000 50 
F10 "SFP3_DEF0" O L 14450 12900 50 
F11 "SFP3_LOS" O L 14450 13100 50 
F12 "SFP3_RS" O L 14450 12700 50 
$EndSheet
$Sheet
S 14450 13400 1200 950 
U 5CC8AFE1
F0 "SFP4" 50
F1 "SFP4.sch" 50
F2 "SFP_4_RX_P" O L 14450 13450 50 
F3 "SFP_4_RX_N" O L 14450 13550 50 
F4 "SFP_4_TX_P" I L 14450 13650 50 
F5 "SFP_4_TX_N" I L 14450 13750 50 
F6 "I2C_SFP4_SDA" B R 15650 13900 50 
F7 "I2C_SFP4_SCL" I R 15650 14000 50 
F8 "SFP4_TX_DIS" O L 14450 13950 50 
F9 "SFP4_TX_FAULT" O L 14450 14150 50 
F10 "SFP4_DEF0" O L 14450 14250 50 
F11 "SFP4_LOS" O L 14450 14050 50 
F12 "SFP4_RS" O L 14450 13850 50 
$EndSheet
Wire Wire Line
	10050 7150 11350 7150
Wire Wire Line
	10050 7300 11350 7300
Wire Wire Line
	10050 7400 11350 7400
Wire Wire Line
	10050 7550 11350 7550
Wire Wire Line
	10050 7650 11350 7650
Wire Wire Line
	10050 8850 11350 8850
Wire Wire Line
	10050 8950 11350 8950
Wire Wire Line
	10050 9100 11350 9100
Wire Wire Line
	10050 9200 11350 9200
Wire Wire Line
	10050 9350 11350 9350
Wire Wire Line
	10050 9450 11350 9450
Text Notes 12400 3800 0    89   ~ 18
DDR3
Wire Notes Line
	11350 9550 12350 9550
Wire Notes Line
	12350 7750 11350 7750
Text Notes 11650 8700 0    50   ~ 10
FMC 2
Text Notes 11700 6900 0    50   ~ 10
FMC 1
Wire Wire Line
	14450 12300 12950 12300
Wire Wire Line
	14450 12400 12950 12400
Wire Wire Line
	14450 12500 12950 12500
Wire Wire Line
	14450 12600 12950 12600
Wire Wire Line
	14450 12800 12950 12800
Wire Wire Line
	14450 12900 12950 12900
Wire Wire Line
	14450 13000 12950 13000
Wire Wire Line
	14450 13100 12950 13100
Wire Wire Line
	14450 13450 12950 13450
Wire Wire Line
	14450 13550 12950 13550
Wire Wire Line
	14450 13650 12950 13650
Wire Wire Line
	14450 13750 12950 13750
Wire Wire Line
	14450 13950 12950 13950
Wire Wire Line
	14450 14050 12950 14050
Wire Wire Line
	14450 14150 12950 14150
Wire Wire Line
	14450 14250 12950 14250
Wire Notes Line
	11350 13200 12050 13200
Wire Notes Line
	12050 13200 12050 12150
Wire Notes Line
	11350 14350 12050 14350
Wire Notes Line
	11350 13300 12050 13300
Text Notes 11600 12250 0    50   ~ 10
SFP1
Text Notes 11600 13400 0    50   ~ 10
SFP2
Text Notes 12550 12250 0    50   ~ 10
SFP3
Text Notes 12550 13400 0    50   ~ 10
SFP4
$Sheet
S 8400 1700 1600 1800
U 5C16BF13
F0 "WhiteRabbit" 50
F1 "WhiteRabbit.sch" 50
F2 "WR_DAC2_SYNC" O R 10000 1800 50 
F3 "WR_DAC_SCLK" O R 10000 1900 50 
F4 "WR_DAC_DIN" I R 10000 2000 50 
F5 "WR_DAC1_SYNC" I R 10000 2100 50 
F6 "CLK20_VCXO" I R 10000 2450 50 
F7 "VCXO_EN" I R 10000 2250 50 
F8 "FPGA_REF_CLK0_P" I R 10000 2700 50 
F9 "FPGA_REF_CLK0_N" I R 10000 2800 50 
F10 "FPGA_REF_CLK1_P" I R 10000 2950 50 
F11 "FPGA_REF_CLK1_N" I R 10000 3050 50 
F12 "CLK_25MHZ" I L 8400 2550 50 
F13 "SI570_CLK_P" O R 10000 3250 50 
F14 "SI570_CLK_N" O R 10000 3350 50 
F15 "SI570_OE" I L 8400 2050 50 
F16 "SI570_SDA" B L 8400 2150 50 
F17 "SI570_SCL" I L 8400 2250 50 
$EndSheet
$Sheet
S 2400 11850 1500 1500
U 5C16BF8E
F0 "Power" 50
F1 "Power.sch" 50
F2 "EN_FMC1_P12V" I L 2400 11950 50 
F3 "EN_PSU_CH" I L 2400 12450 50 
F4 "I2C_PM_SDA" B R 3900 12100 50 
F5 "I2C_PM_SCL" I R 3900 12000 50 
F6 "POE_VC[1..4]" I R 3900 12900 50 
F7 "FPGA_XR_GPIO_0" I R 3900 12250 50 
F8 "EN_FMC2_P12V" I L 2400 12050 50 
F9 "AT_DET" O R 3900 12400 50 
F10 "OVER_TEMP" I L 2400 12550 50 
F11 "I2C_APP_SDA" B R 3900 12550 50 
F12 "I2C_APP_SCL" I R 3900 12650 50 
$EndSheet
$Sheet
S 1950 7250 1500 1550
U 5C16C03C
F0 "USB" 50
F1 "USB.sch" 50
F2 "ISP_RSTn" O R 3450 8000 50 
F3 "LPC_ISPn" O R 3450 8100 50 
F4 "EN_USB_JTAG" O R 3450 8250 50 
F5 "USB_TCK" O R 3450 7300 50 
F6 "USB_TDI_DO" O R 3450 7400 50 
F7 "USB_TMS" O R 3450 7500 50 
F8 "USB_TDO_DI" I R 3450 7600 50 
F9 "MMC_CONS_PROG_TxD" I R 3450 7800 50 
F10 "MMC_CONS_PROG_RxD" O R 3450 7900 50 
F11 "EN_CON_JTAG" I R 3450 8350 50 
F12 "FPGA_TxD" O R 3450 8500 50 
F13 "FPGA_RxD" I R 3450 8600 50 
F14 "FPGA_RTS" O R 3450 8700 50 
$EndSheet
Wire Notes Line
	12050 14350 12050 13300
Wire Wire Line
	10050 4200 11350 4200
Wire Wire Line
	10050 4500 11350 4500
Wire Wire Line
	10050 4600 11350 4600
Wire Wire Line
	10050 4700 11350 4700
Wire Wire Line
	10050 4800 11350 4800
Wire Bus Line
	10050 4300 11350 4300
Wire Bus Line
	10050 4400 11350 4400
Wire Notes Line
	12950 3650 12200 3650
Wire Notes Line
	12200 3650 12200 5750
Wire Notes Line
	12200 5750 12950 5750
Text Notes 11450 4100 0    50   ~ 10
ETHERNET
Wire Notes Line
	12950 12150 12250 12150
Wire Notes Line
	12250 12150 12250 13200
Wire Notes Line
	12250 13200 12950 13200
Wire Notes Line
	12950 13300 12250 13300
Wire Notes Line
	12250 13300 12250 14350
Wire Notes Line
	12250 14350 12950 14350
$Sheet
S 1950 9950 1150 1000
U 5D05A99E
F0 "Thermometers" 50
F1 "Thermometers.sch" 50
F2 "I2C_PM_SDA" B R 3100 10550 50 
F3 "I2C_PM_SCL" I R 3100 10450 50 
F4 "ALERT" O R 3100 10000 50 
F5 "DXP_0" I R 3100 10800 50 
F6 "DXN_0" I R 3100 10900 50 
F7 "THERM" O R 3100 10100 50 
F8 "FANFAIL" O R 3100 10200 50 
F9 "OVER_TEMP" O R 3100 10300 50 
$EndSheet
Wire Wire Line
	9750 12300 11350 12300
Wire Wire Line
	9750 12400 11350 12400
Wire Wire Line
	9750 12500 11350 12500
Wire Wire Line
	9750 12600 11350 12600
Wire Wire Line
	9750 12800 11350 12800
Wire Wire Line
	9750 12900 11350 12900
Wire Wire Line
	9750 13000 11350 13000
Wire Wire Line
	9750 13100 11350 13100
Wire Wire Line
	9750 13450 11350 13450
Wire Wire Line
	9750 13550 11350 13550
Wire Wire Line
	9750 13650 11350 13650
Wire Wire Line
	9750 13750 11350 13750
Wire Wire Line
	9750 13950 11350 13950
Wire Wire Line
	9750 14050 11350 14050
Wire Wire Line
	9750 14150 11350 14150
Wire Wire Line
	9750 14250 11350 14250
Wire Wire Line
	14450 3750 13700 3750
Wire Wire Line
	13700 3750 13700 1200
Wire Wire Line
	13700 1200 7000 1200
Wire Wire Line
	7000 1200 7000 6750
Wire Wire Line
	7000 6750 6800 6750
Wire Wire Line
	6800 7100 7450 7100
Wire Wire Line
	7450 7100 7450 6350
Wire Wire Line
	7450 6350 8500 6350
Wire Wire Line
	8200 13900 8550 13900
Wire Wire Line
	8000 14700 16350 14700
Wire Wire Line
	16350 14700 16350 12750
Wire Wire Line
	16350 12750 15650 12750
Wire Wire Line
	7950 14750 16300 14750
Wire Wire Line
	16300 14750 16300 12850
Wire Wire Line
	16300 12850 15650 12850
Wire Wire Line
	7800 14850 16050 14850
Wire Wire Line
	16050 14850 16050 13900
Wire Wire Line
	16050 13900 15650 13900
Wire Wire Line
	7750 14900 16000 14900
Wire Wire Line
	16000 14900 16000 14000
Wire Wire Line
	16000 14000 15650 14000
Wire Wire Line
	3900 12100 4200 12100
Wire Wire Line
	3900 12000 4250 12000
Wire Wire Line
	6800 8150 8500 8150
Wire Bus Line
	8400 4850 6700 4850
Wire Bus Line
	4350 7000 5200 7000
Wire Wire Line
	5200 7300 4150 7300
Wire Wire Line
	5200 7100 4250 7100
Wire Wire Line
	4250 7100 4250 5550
Wire Wire Line
	5200 7200 4200 7200
Wire Wire Line
	4200 7200 4200 5650
Wire Bus Line
	3900 12900 4600 12900
Wire Wire Line
	3450 7800 5200 7800
Wire Wire Line
	3450 7900 5200 7900
Wire Wire Line
	3450 8000 5200 8000
Wire Wire Line
	3450 8100 5200 8100
Text Label 3500 7300 0    50   ~ 10
USB_TCK
Text Label 3500 7400 0    50   ~ 10
USB_TDI_DO
Text Label 3500 7500 0    50   ~ 10
USB_TMS
Text Label 3500 7600 0    50   ~ 10
USB_TDO_DI
Wire Wire Line
	3950 7300 3450 7300
Wire Wire Line
	3950 7400 3450 7400
Wire Wire Line
	3950 7500 3450 7500
Wire Wire Line
	3950 7600 3450 7600
Text Label 13600 10000 0    50   ~ 10
USB_TCK
Text Label 13600 10100 0    50   ~ 10
USB_TDI_DO
Text Label 13600 10200 0    50   ~ 10
USB_TMS
Text Label 13600 10300 0    50   ~ 10
USB_TDO_DI
Text Label 8050 6800 0    50   ~ 10
FMC1_TCK
Text Label 8050 6900 0    50   ~ 10
FMC1_TDI
Text Label 8050 7000 0    50   ~ 10
FMC1_TDO
Text Label 8050 7100 0    50   ~ 10
FMC1_TMS
Text Label 8050 7200 0    50   ~ 10
FMC1_TRST
Wire Wire Line
	8050 6800 8500 6800
Wire Wire Line
	8050 6900 8500 6900
Wire Wire Line
	8050 7000 8500 7000
Wire Wire Line
	8050 7100 8500 7100
Wire Wire Line
	8050 7200 8500 7200
Text Label 8050 8600 0    50   ~ 10
FMC2_TCK
Text Label 8050 8700 0    50   ~ 10
FMC2_TDI
Text Label 8050 8800 0    50   ~ 10
FMC2_TDO
Text Label 8050 8900 0    50   ~ 10
FMC2_TMS
Text Label 8050 9000 0    50   ~ 10
FMC2_TRST
Wire Wire Line
	7800 8350 8500 8350
Wire Wire Line
	7900 8450 8500 8450
Wire Wire Line
	8050 8600 8500 8600
Wire Wire Line
	8050 8700 8500 8700
Wire Wire Line
	8050 8800 8500 8800
Wire Wire Line
	8050 8900 8500 8900
Wire Wire Line
	8050 9000 8500 9000
Text Label 15750 10500 0    50   ~ 10
FMC1_TCK
Text Label 15750 10600 0    50   ~ 10
FMC1_TDI
Text Label 15750 10700 0    50   ~ 10
FMC1_TDO
Text Label 15750 10800 0    50   ~ 10
FMC1_TMS
Text Label 15750 10900 0    50   ~ 10
FMC1_TRST
Text Label 15750 11050 0    50   ~ 10
FMC2_TCK
Text Label 15750 11150 0    50   ~ 10
FMC2_TDI
Text Label 15750 11250 0    50   ~ 10
FMC2_TDO
Text Label 15750 11350 0    50   ~ 10
FMC2_TMS
Text Label 15750 11450 0    50   ~ 10
FMC2_TRST
Wire Wire Line
	13600 10000 14150 10000
Wire Wire Line
	13600 10100 14150 10100
Wire Wire Line
	13600 10200 14150 10200
Wire Wire Line
	13600 10300 14150 10300
Wire Wire Line
	12950 10600 14150 10600
Wire Wire Line
	12950 10700 14150 10700
Wire Wire Line
	12950 10800 14150 10800
Wire Wire Line
	12950 10900 14150 10900
Wire Wire Line
	15650 10500 16200 10500
Wire Wire Line
	15650 10600 16200 10600
Wire Wire Line
	15650 10700 16200 10700
Wire Wire Line
	15650 10800 16200 10800
Wire Wire Line
	15650 10900 16200 10900
Wire Wire Line
	15650 11050 16200 11050
Wire Wire Line
	15650 11150 16200 11150
Wire Wire Line
	15650 11250 16200 11250
Wire Wire Line
	15650 11350 16200 11350
Wire Wire Line
	15650 11450 16200 11450
Text Label 13600 11050 0    50   ~ 10
EN_USB_JTAG
Text Label 3500 8250 0    50   ~ 10
EN_USB_JTAG
Wire Wire Line
	4000 8250 3450 8250
Wire Wire Line
	4050 4050 8400 4050
Wire Wire Line
	4050 4150 8400 4150
Wire Wire Line
	4050 4300 8400 4300
Wire Wire Line
	4050 4400 8400 4400
Wire Bus Line
	14450 3950 12950 3950
Wire Wire Line
	14450 4550 12950 4550
Wire Wire Line
	14450 4450 12950 4450
Wire Wire Line
	14450 4350 12950 4350
Wire Wire Line
	14450 4250 12950 4250
Wire Bus Line
	14450 4150 12950 4150
Wire Bus Line
	14450 4050 12950 4050
$Sheet
S 11350 1550 1600 12950
U 5C907554
F0 "FPGA" 50
F1 "FPGA.sch" 50
F2 "DDR3_BA[0..2]" B R 12950 3950 50 
F3 "DDR3_A[0..15]" B R 12950 4150 50 
F4 "DDR3_CK_P" B R 12950 4250 50 
F5 "DDR3_CK_N" B R 12950 4350 50 
F6 "DDR3_CKE" B R 12950 4450 50 
F7 "DDR3_CS" B R 12950 4550 50 
F8 "DDR3_LDM" B R 12950 4650 50 
F9 "DDR3_ODT" B R 12950 4750 50 
F10 "DDR3_RAS" B R 12950 4850 50 
F11 "DDR3_CAS" B R 12950 4950 50 
F12 "DDR3_WE" B R 12950 5050 50 
F13 "DDR3_RST_N" B R 12950 5150 50 
F14 "DDR3_UDM" B R 12950 5250 50 
F15 "DDR3_LDQS_P" B R 12950 5350 50 
F16 "DDR3_LDQS_N" B R 12950 5450 50 
F17 "DDR3_UDQS_P" B R 12950 5550 50 
F18 "DDR3_UDQS_N" B R 12950 5650 50 
F19 "DDR3_DQ[0..15]" B R 12950 4050 50 
F20 "FMC1_GBTCLK0_M2C_P" I L 11350 7050 50 
F21 "FMC1_GBTCLK0_M2C_N" I L 11350 7150 50 
F22 "FMC1_CLK1_M2C_P" I L 11350 7300 50 
F23 "FMC1_CLK1_M2C_N" I L 11350 7400 50 
F24 "FMC1_CLK0_M2C_P" I L 11350 7550 50 
F25 "FMC1_CLK0_M2C_N" I L 11350 7650 50 
F26 "FMC2_GBTCLK0_M2C_P" I L 11350 8850 50 
F27 "FMC2_GBTCLK0_M2C_N" I L 11350 8950 50 
F28 "FMC2_CLK1_M2C_P" I L 11350 9100 50 
F29 "FMC2_CLK1_M2C_N" I L 11350 9200 50 
F30 "FMC2_CLK0_M2C_P" I L 11350 9350 50 
F31 "FMC2_CLK0_M2C_N" I L 11350 9450 50 
F32 "SFP_1_RX_P" I L 11350 12300 50 
F33 "SFP_1_RX_N" I L 11350 12400 50 
F34 "SFP_1_TX_P" O L 11350 12500 50 
F35 "SFP_1_TX_N" O L 11350 12600 50 
F36 "SFP1_TX_DIS" I L 11350 12800 50 
F37 "SFP1_TX_FAULT" I L 11350 13000 50 
F38 "SFP1_DEF0" I L 11350 13100 50 
F39 "SFP1_LOS" I L 11350 12900 50 
F40 "SFP_2_RX_P" I L 11350 13450 50 
F41 "SFP_2_RX_N" I L 11350 13550 50 
F42 "SFP_2_TX_P" O L 11350 13650 50 
F43 "SFP_2_TX_N" O L 11350 13750 50 
F44 "SFP2_TX_DIS" I L 11350 13950 50 
F45 "SFP2_TX_FAULT" I L 11350 14150 50 
F46 "SFP2_DEF0" I L 11350 14250 50 
F47 "SFP2_LOS" I L 11350 14050 50 
F48 "SFP_3_RX_P" I R 12950 12300 50 
F49 "SFP_3_RX_N" I R 12950 12400 50 
F50 "SFP_3_TX_P" O R 12950 12500 50 
F51 "SFP_3_TX_N" O R 12950 12600 50 
F52 "SFP3_TX_DIS" I R 12950 12800 50 
F53 "SFP3_TX_FAULT" I R 12950 13000 50 
F54 "SFP3_DEF0" I R 12950 12900 50 
F55 "SFP3_LOS" I R 12950 13100 50 
F56 "SFP_4_RX_P" I R 12950 13450 50 
F57 "SFP_4_RX_N" I R 12950 13550 50 
F58 "SFP_4_TX_P" O R 12950 13650 50 
F59 "SFP_4_TX_N" O R 12950 13750 50 
F60 "SFP4_TX_DIS" I R 12950 13950 50 
F61 "SFP4_TX_FAULT" I R 12950 14150 50 
F62 "SFP4_DEF0" I R 12950 14250 50 
F63 "SFP4_LOS" I R 12950 14050 50 
F64 "PHY_RSTn" I L 11350 4200 50 
F65 "DXP_0" I L 11350 10800 50 
F66 "DXN_0" I L 11350 10900 50 
F67 "FPGA_TDI" I R 12950 10600 50 
F68 "FPGA_TDO" O R 12950 10700 50 
F69 "FPGA_TMS" I R 12950 10800 50 
F70 "FPGA_TCK" I R 12950 10900 50 
F71 "I2C_FPGA_SDA" B L 11350 11450 50 
F72 "I2C_FPGA_SCL" O L 11350 11550 50 
F73 "FPGA_RESETn" I L 11350 10550 50 
F74 "BOOT_MODE[0..2]" I L 11350 10650 50 
F75 "FPGA_XR_GPIO_0" I L 11350 11200 50 
F76 "WR_DAC2_SYNC" I L 11350 1800 50 
F77 "WR_DAC_SCLK" I L 11350 1900 50 
F78 "WR_DAC_DIN" I L 11350 2000 50 
F79 "WR_DAC1_SYNC" I L 11350 2100 50 
F80 "FPGA_REF_CLK0_P" I L 11350 2700 50 
F81 "FPGA_REF_CLK0_N" I L 11350 2800 50 
F82 "FPGA_REF_CLK1_P" I L 11350 2950 50 
F83 "FPGA_REF_CLK1_N" I L 11350 3050 50 
F84 "VCXO_EN" I L 11350 2250 50 
F85 "CLK20_VCXO" I L 11350 2450 50 
F86 "Pmod1_[0..7]" B R 12950 7550 50 
F87 "Pmod2_[0..7]" B R 12950 7750 50 
F88 "FPGA_DONE" I L 11350 9850 50 
F89 "FCLKA_N" I L 11350 5500 50 
F90 "FCLKA_P" I L 11350 5600 50 
F91 "FPGA_SCK" I L 11350 10050 50 
F92 "FPGA_SSEL" I L 11350 10150 50 
F93 "FPGA_MISO" I L 11350 10250 50 
F94 "FPGA_MOSI" I L 11350 10350 50 
F95 "FPGA_INT" I L 11350 9950 50 
F96 "I2C_FPGA_SW_RST" O L 11350 11650 50 
F97 "I2C_HDMI_SCL" I L 11350 11950 50 
F98 "I2C_HDMI_SDA" B L 11350 12050 50 
F99 "PROG_B" I L 11350 9750 50 
F100 "THERM" I R 12950 8800 50 
F101 "FANFAIL" I R 12950 9000 50 
F102 "ALERT" I R 12950 8900 50 
F103 "I2C_APP_SDA" B L 11350 11750 50 
F104 "I2C_APP_SCL" I L 11350 11850 50 
F105 "SFP1_RS" I L 11350 12700 50 
F106 "SFP2_RS" I L 11350 13850 50 
F107 "SFP3_RS" I R 12950 12700 50 
F108 "SFP4_RS" I R 12950 13850 50 
F109 "Self_FPGA_TMS" O R 12950 11300 50 
F110 "Self_FPGA_TDO" I R 12950 11400 50 
F111 "Self_FPGA_TDI" O R 12950 11500 50 
F112 "Self_FPGA_TCK" O R 12950 11600 50 
F113 "EN_CON_JTAG" I R 12950 11150 50 
F114 "EN_USB_JTAG" I R 12950 11050 50 
F115 "FPGA_RTS" I R 12950 9300 50 
F116 "FPGA_TxD" I R 12950 9400 50 
F117 "FPGA_RxD" O R 12950 9500 50 
F118 "TCLKA_P" I L 11350 5750 50 
F119 "TCLKA_N" I L 11350 5850 50 
F120 "Rx18_P" I L 11350 6050 50 
F121 "Rx18_N" I L 11350 6150 50 
F122 "RGMII_RXD[0..3]" I L 11350 4300 50 
F123 "RGMII_TXD[0..3]" I L 11350 4400 50 
F124 "RGMII_TX_EN" I L 11350 4500 50 
F125 "RGMII_TX_CLK" I L 11350 4600 50 
F126 "RGMII_RX_DV" I L 11350 4700 50 
F127 "RGMII_RX_CLK" I L 11350 4800 50 
F128 "SI570_CLK_P" I L 11350 3250 50 
F129 "SI570_CLK_N" I L 11350 3350 50 
F130 "SI570_OE" O R 12950 9800 50 
$EndSheet
Wire Wire Line
	10000 1800 11350 1800
Wire Wire Line
	10000 1900 11350 1900
Wire Wire Line
	10000 2000 11350 2000
Wire Wire Line
	10000 2100 11350 2100
Wire Wire Line
	10000 2250 11350 2250
Wire Wire Line
	10000 2450 11350 2450
Wire Wire Line
	10000 2700 11350 2700
Wire Wire Line
	10000 2800 11350 2800
Wire Wire Line
	10000 2950 11350 2950
Wire Wire Line
	10000 3050 11350 3050
Wire Wire Line
	11350 11200 4500 11200
Wire Wire Line
	4500 11200 4500 12250
Wire Bus Line
	12950 7550 14200 7550
Wire Bus Line
	12950 7750 14200 7750
Wire Notes Line
	12150 1600 11350 1600
Wire Notes Line
	12350 7300 12950 7300
Wire Notes Line
	12350 7900 12950 7900
Text Notes 12500 7400 0    50   ~ 10
PMOD
Text Notes 11500 1700 0    50   ~ 10
White Rabbit
Text Notes 12550 10550 0    50   ~ 10
JTAG\n
Wire Wire Line
	4050 5750 4150 5750
Wire Wire Line
	4150 5750 4150 7300
Wire Wire Line
	4050 5650 4200 5650
Wire Wire Line
	4050 5550 4250 5550
Wire Bus Line
	4050 5400 4350 5400
Wire Bus Line
	4350 5400 4350 7000
Wire Bus Line
	6700 6450 4600 6450
Wire Bus Line
	4600 6450 4600 12900
Wire Wire Line
	4050 4600 5700 4600
Wire Wire Line
	4050 4700 5600 4700
Wire Wire Line
	5700 5500 11350 5500
Wire Wire Line
	5600 5600 11350 5600
Wire Wire Line
	8400 2550 7200 2550
Wire Wire Line
	7200 2550 7200 4550
Wire Wire Line
	7200 7450 6800 7450
Wire Wire Line
	8400 4550 7200 4550
Connection ~ 7200 4550
Wire Wire Line
	7200 4550 7200 7450
Wire Wire Line
	11350 10550 6800 10550
Wire Bus Line
	11350 10650 6800 10650
Wire Wire Line
	11350 10050 6800 10050
Wire Wire Line
	11350 10150 6800 10150
Wire Wire Line
	11350 10250 6800 10250
Wire Wire Line
	11350 10350 6800 10350
Wire Wire Line
	3100 10800 11350 10800
Wire Wire Line
	3100 10900 11350 10900
Wire Wire Line
	4250 10250 4250 10450
Wire Wire Line
	4200 10150 4200 10550
Wire Wire Line
	3100 10450 4250 10450
Connection ~ 4250 10450
Wire Wire Line
	4250 10450 4250 12000
Wire Wire Line
	3100 10550 4200 10550
Connection ~ 4200 10550
Wire Wire Line
	4200 10550 4200 12100
Wire Wire Line
	3100 10300 3350 10300
Wire Wire Line
	3600 10300 3600 9300
Wire Wire Line
	3900 12250 4500 12250
Wire Wire Line
	4200 10150 5200 10150
Wire Wire Line
	4250 10250 5200 10250
Wire Bus Line
	6700 4850 6700 6450
Wire Wire Line
	6800 6950 7400 6950
Wire Wire Line
	7400 6950 7400 4750
Wire Wire Line
	7400 4750 8400 4750
Wire Wire Line
	6800 6850 7350 6850
Wire Wire Line
	7350 6850 7350 4650
Wire Wire Line
	7350 4650 8400 4650
Wire Wire Line
	6800 9950 11350 9950
Wire Wire Line
	6800 14550 7750 14550
Wire Wire Line
	7750 14550 7750 14900
Wire Wire Line
	6800 14450 7800 14450
Wire Wire Line
	7800 14450 7800 14850
Wire Wire Line
	6800 14300 7950 14300
Wire Wire Line
	7950 14300 7950 14750
Wire Wire Line
	6800 14200 8000 14200
Wire Wire Line
	8000 14200 8000 14700
Wire Wire Line
	6800 13950 8200 13950
Wire Wire Line
	8200 13950 8200 13900
Wire Wire Line
	6800 13800 8150 13800
Wire Wire Line
	8150 13800 8150 12850
Wire Wire Line
	8150 12850 8550 12850
Wire Wire Line
	6800 13700 8100 13700
Wire Wire Line
	8100 13700 8100 12750
Wire Wire Line
	8100 12750 8550 12750
Wire Wire Line
	7600 13000 6800 13000
Wire Wire Line
	7700 13100 6800 13100
Wire Wire Line
	7800 13250 6800 13250
Wire Wire Line
	7800 8350 7800 13250
Wire Wire Line
	7900 13350 6800 13350
Wire Wire Line
	7900 8450 7900 13350
Wire Wire Line
	6800 13500 7950 13500
Wire Wire Line
	7950 13500 7950 11950
Wire Wire Line
	7950 11950 11350 11950
Wire Wire Line
	6800 13600 8000 13600
Wire Wire Line
	8000 13600 8000 12050
Wire Wire Line
	8000 12050 11350 12050
Wire Wire Line
	8250 14050 8250 14000
Wire Wire Line
	8250 14000 8550 14000
Wire Wire Line
	6800 14050 8250 14050
Wire Wire Line
	5100 13000 5000 13000
Wire Wire Line
	5000 11450 5000 13000
Wire Wire Line
	5100 13100 4900 13100
Wire Wire Line
	4900 11550 4900 13100
Wire Wire Line
	5000 11450 11350 11450
Wire Wire Line
	4900 11550 11350 11550
Wire Wire Line
	11350 11650 4750 11650
Wire Wire Line
	4750 11650 4750 13200
Wire Wire Line
	3900 12400 4350 12400
Wire Wire Line
	4350 12400 4350 9750
Wire Wire Line
	4350 9750 5200 9750
Wire Wire Line
	3350 10300 3350 11150
Connection ~ 3350 10300
Wire Wire Line
	3350 10300 3600 10300
Wire Wire Line
	5100 13200 4750 13200
Text Label 3200 10100 0    50   ~ 10
THERM
Text Label 3200 10000 0    50   ~ 10
ALERT
Text Label 3200 10200 0    50   ~ 10
FANFAIL
Wire Wire Line
	3500 10000 3100 10000
Wire Wire Line
	3500 10100 3100 10100
Wire Wire Line
	3500 10200 3100 10200
Text Label 13400 8800 2    50   ~ 10
THERM
Text Label 13400 8900 2    50   ~ 10
ALERT
Text Label 13400 9000 2    50   ~ 10
FANFAIL
Wire Wire Line
	13400 8800 12950 8800
Wire Wire Line
	13400 8900 12950 8900
Wire Wire Line
	13400 9000 12950 9000
Wire Wire Line
	6800 9750 11350 9750
Wire Wire Line
	6800 9850 11350 9850
Wire Wire Line
	5200 10650 5000 10650
Wire Wire Line
	5000 10650 5000 11450
Connection ~ 5000 11450
Wire Wire Line
	5200 10550 4900 10550
Wire Wire Line
	4900 10550 4900 11550
Connection ~ 4900 11550
Wire Wire Line
	2400 12550 2050 12550
Wire Wire Line
	2050 11150 3350 11150
Wire Wire Line
	5100 13450 4350 13450
Wire Wire Line
	4350 13450 4350 12550
Wire Wire Line
	4350 12550 3900 12550
Wire Wire Line
	5100 13550 4250 13550
Wire Wire Line
	4250 13550 4250 12650
Wire Wire Line
	4250 12650 3900 12650
Wire Wire Line
	11350 11750 7450 11750
Wire Wire Line
	5150 11750 5150 12550
Wire Wire Line
	5150 12550 4350 12550
Connection ~ 4350 12550
Wire Wire Line
	11350 11850 7500 11850
Wire Wire Line
	5250 11850 5250 12650
Wire Wire Line
	5250 12650 4250 12650
Connection ~ 4250 12650
Wire Wire Line
	9750 12700 11350 12700
Wire Wire Line
	9750 13850 11350 13850
Wire Wire Line
	12950 12700 14450 12700
Wire Wire Line
	12950 13850 14450 13850
Wire Wire Line
	10050 7050 11350 7050
Wire Wire Line
	3600 9300 5200 9300
Wire Wire Line
	2050 11150 2050 12550
Wire Wire Line
	3750 11250 3750 9450
Wire Wire Line
	2150 11250 2150 12450
Wire Wire Line
	2150 11250 3750 11250
Wire Wire Line
	2150 12450 2400 12450
Wire Wire Line
	2400 11950 2300 11950
Wire Wire Line
	2300 11950 2300 11650
Wire Wire Line
	2300 11650 3950 11650
Wire Wire Line
	3950 11650 3950 9650
Wire Wire Line
	3950 9650 5200 9650
Wire Wire Line
	2400 12050 2250 12050
Wire Wire Line
	2250 12050 2250 11550
Wire Wire Line
	2250 11550 3850 11550
Wire Wire Line
	3850 11550 3850 9550
Wire Wire Line
	3850 9550 5200 9550
Wire Wire Line
	3750 9450 5200 9450
Wire Notes Line
	12950 11700 12300 11700
Wire Notes Line
	12300 11700 12300 10450
Wire Notes Line
	12300 10450 12950 10450
Wire Wire Line
	12950 11300 14150 11300
Wire Wire Line
	12950 11400 14150 11400
Wire Wire Line
	12950 11500 14150 11500
Wire Wire Line
	12950 11600 14150 11600
Text Label 13600 11150 0    50   ~ 10
EN_CON_JTAG
Text Label 3500 8350 0    50   ~ 10
EN_CON_JTAG
Wire Wire Line
	3450 8350 4000 8350
Wire Wire Line
	12950 11050 14150 11050
Wire Wire Line
	12950 11150 14150 11150
Text Label 6950 8650 0    50   ~ 10
LPC_RST
Text Label 6950 8750 0    50   ~ 10
MMC_TCK
Text Label 6950 8850 0    50   ~ 10
MMC_TMS
Text Label 6950 8950 0    50   ~ 10
MMC_TDO
Text Label 6950 9050 0    50   ~ 10
MMC_TDI
Wire Wire Line
	7300 8650 6800 8650
Wire Wire Line
	7300 8750 6800 8750
Wire Wire Line
	7300 8850 6800 8850
Wire Wire Line
	7300 8950 6800 8950
Wire Wire Line
	7300 9050 6800 9050
Text Label 15800 9950 0    50   ~ 10
LPC_RST
Text Label 15800 10050 0    50   ~ 10
MMC_TCK
Text Label 15800 10150 0    50   ~ 10
MMC_TMS
Text Label 15800 10250 0    50   ~ 10
MMC_TDO
Text Label 15800 10350 0    50   ~ 10
MMC_TDI
Wire Wire Line
	16150 9950 15650 9950
Wire Wire Line
	16150 10050 15650 10050
Wire Wire Line
	16150 10150 15650 10150
Wire Wire Line
	16150 10250 15650 10250
Wire Wire Line
	16150 10350 15650 10350
Text Label 7750 6450 0    50   ~ 10
FMC1_PRSNT_M2C_L
Text Label 7750 8250 0    50   ~ 10
FMC2_PRSNT_M2C_L
Text Label 13400 11700 0    50   ~ 10
FMC1_PRSNT_M2C_L
Text Label 13400 11800 0    50   ~ 10
FMC2_PRSNT_M2C_L
$Comp
L marble_misc:HDT0001-HDT0001 S1
U 1 1 5DAB8DC7
P 2950 9200
F 0 "S1" H 3550 9465 50  0000 C CNN
F 1 "HDT0001" H 3550 9374 50  0000 C CNN
F 2 "Marble:HDT0001" H 4000 9300 50  0001 L CNN
F 3 "https://www.ckswitches.com/media/1307/hdt.pdf" H 4000 9200 50  0001 L CNN
F 4 "HDT0001 (Detector Switches)" H 4000 9100 50  0001 L CNN "Description"
F 5 "3" H 4000 9000 50  0001 L CNN "Height"
F 6 "C & K COMPONENTS" H 4000 8900 50  0001 L CNN "Manufacturer"
F 7 "HDT0001" H 4000 8800 50  0001 L CNN "Manufacturer Part Number"
F 8 "7931598" H 4000 8700 50  0001 L CNN "RS Part Number"
F 9 "http://uk.rs-online.com/web/p/products/7931598" H 4000 8600 50  0001 L CNN "RS Price/Stock"
F 10 "70417475" H 4000 8500 50  0001 L CNN "Allied_Number"
F 11 "https://www.alliedelec.com/c-k-hdt0001/70417475/" H 4000 8400 50  0001 L CNN "Allied Price/Stock"
F 12 "611-HDT0001" H 4000 8300 50  0001 L CNN "Mouser Part Number"
F 13 "https://www.mouser.com/Search/Refine.aspx?Keyword=611-HDT0001" H 4000 8200 50  0001 L CNN "Mouser Price/Stock"
F 14 "-standalone" H 2950 9200 50  0001 C CNN "config"
F 15 "Yes" H 2950 9200 50  0001 C CNN "SMD"
	1    2950 9200
	-1   0    0    -1  
$EndComp
$Comp
L Resistors_SMD:R1206_1M_1%_0.25W_100PPM R243
U 1 1 5C72633B
P 2350 14550
F 0 "R243" H 2500 14747 50  0000 C CNN
F 1 "R1206_1M_1%_0.25W_100PPM" H 2350 14340 60  0001 L CNN
F 2 "Marble:RESC3216X65N" H 2350 13530 60  0001 L CNN
F 3 "\\\\cern.ch\\dfs\\Applications\\Altium\\Datasheets\\R1206_NIC_NRC.pdf" H 2350 14160 60  0001 L CNN
F 4 "1M" H 2500 14656 50  0000 C CNN "Val"
F 5 "R1206_1M_1%_0.25W_100PPM" H 2350 14070 60  0001 L CNN "Part Number"
F 6 "Resistor - 1%" H 2350 13980 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Resistors.SchLib" H 2350 13890 60  0001 L CNN "Library Path"
F 8 "=Value" H 2350 13800 60  0001 L CNN "Comment"
F 9 "Standard" H 2350 13710 60  0001 L CNN "Component Kind"
F 10 "Standard" H 2350 13620 60  0001 L CNN "Component Type"
F 11 " " H 2350 13440 60  0001 L CNN "PackageDescription"
F 12 "2" H 2350 13350 60  0001 L CNN "Pin Count"
F 13 "PcbLib\\Resistors SMD.PcbLib" H 2350 13260 60  0001 L CNN "Footprint Path"
F 14 "RESC3216X65N" H 2350 13170 60  0001 L CNN "Footprint Ref"
F 15 "Preferred" H 2350 12990 60  0001 L CNN "Status"
F 16 "0.25W" H 2350 12900 60  0001 L CNN "Power"
F 17 "±100ppm/°C" H 2350 12810 60  0001 L CNN "TC"
F 18 " " H 2350 12720 60  0001 L CNN "Voltage"
F 19 "±1%" H 2350 12630 60  0001 L CNN "Tolerance"
F 20 "General Purpose Thick Film Chip Resistor" H 2350 12540 60  0001 L CNN "Part Description"
F 21 "GENERIC" H 2350 12450 60  0001 L CNN "Manufacturer"
F 22 "R1206_1M_1%_0.25W_100PPM" H 2350 12360 60  0001 L CNN "Manufacturer Part Number"
F 23 "1206" H 2350 12270 60  0001 L CNN "Case"
F 24 "No" H 2350 12180 60  0001 L CNN "PressFit"
F 25 "Yes" H 2350 12090 60  0001 L CNN "Mounted"
F 26 " " H 2350 12000 60  0001 L CNN "Sense Comment"
F 27 "No" H 2350 11910 60  0001 L CNN "Sense"
F 28 " " H 2350 11820 60  0001 L CNN "Status Comment"
F 29 "No" H 2350 11730 60  0001 L CNN "Socket"
F 30 "Yes" H 2350 11640 60  0001 L CNN "SMD"
F 31 " " H 2350 11550 60  0001 L CNN "ComponentHeight"
F 32 "NIC COMPONENT" H 2350 11460 60  0001 L CNN "Manufacturer1 Example"
F 33 "NRC12F1004TRF" H 2350 11370 60  0001 L CNN "Manufacturer1 Part Number"
F 34 "0.65mm" H 2350 11280 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 35 "CERN DEM JLC" H 2350 11100 60  0001 L CNN "Author"
F 36 "12/03/07 00:00:00" H 2350 11010 60  0001 L CNN "CreateDate"
F 37 "03/13/08 00:00:00" H 2350 10920 60  0001 L CNN "LatestRevisionDate"
F 38 "Resistors SMD" H 2350 10830 60  0001 L CNN "Library Name"
F 39 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 2350 10740 60  0001 L CNN "License"
	1    2350 14550
	1    0    0    -1  
$EndComp
$Comp
L Resistors_SMD:R1206_1M_1%_0.25W_100PPM R244
U 1 1 5C726512
P 3150 14550
F 0 "R244" H 3300 14747 50  0000 C CNN
F 1 "R1206_1M_1%_0.25W_100PPM" H 3150 14340 60  0001 L CNN
F 2 "Marble:RESC3216X65N" H 3150 13530 60  0001 L CNN
F 3 "\\\\cern.ch\\dfs\\Applications\\Altium\\Datasheets\\R1206_NIC_NRC.pdf" H 3150 14160 60  0001 L CNN
F 4 "1M" H 3300 14656 50  0000 C CNN "Val"
F 5 "R1206_1M_1%_0.25W_100PPM" H 3150 14070 60  0001 L CNN "Part Number"
F 6 "Resistor - 1%" H 3150 13980 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Resistors.SchLib" H 3150 13890 60  0001 L CNN "Library Path"
F 8 "=Value" H 3150 13800 60  0001 L CNN "Comment"
F 9 "Standard" H 3150 13710 60  0001 L CNN "Component Kind"
F 10 "Standard" H 3150 13620 60  0001 L CNN "Component Type"
F 11 " " H 3150 13440 60  0001 L CNN "PackageDescription"
F 12 "2" H 3150 13350 60  0001 L CNN "Pin Count"
F 13 "PcbLib\\Resistors SMD.PcbLib" H 3150 13260 60  0001 L CNN "Footprint Path"
F 14 "RESC3216X65N" H 3150 13170 60  0001 L CNN "Footprint Ref"
F 15 "Preferred" H 3150 12990 60  0001 L CNN "Status"
F 16 "0.25W" H 3150 12900 60  0001 L CNN "Power"
F 17 "±100ppm/°C" H 3150 12810 60  0001 L CNN "TC"
F 18 " " H 3150 12720 60  0001 L CNN "Voltage"
F 19 "±1%" H 3150 12630 60  0001 L CNN "Tolerance"
F 20 "General Purpose Thick Film Chip Resistor" H 3150 12540 60  0001 L CNN "Part Description"
F 21 "GENERIC" H 3150 12450 60  0001 L CNN "Manufacturer"
F 22 "R1206_1M_1%_0.25W_100PPM" H 3150 12360 60  0001 L CNN "Manufacturer Part Number"
F 23 "1206" H 3150 12270 60  0001 L CNN "Case"
F 24 "No" H 3150 12180 60  0001 L CNN "PressFit"
F 25 "Yes" H 3150 12090 60  0001 L CNN "Mounted"
F 26 " " H 3150 12000 60  0001 L CNN "Sense Comment"
F 27 "No" H 3150 11910 60  0001 L CNN "Sense"
F 28 " " H 3150 11820 60  0001 L CNN "Status Comment"
F 29 "No" H 3150 11730 60  0001 L CNN "Socket"
F 30 "Yes" H 3150 11640 60  0001 L CNN "SMD"
F 31 " " H 3150 11550 60  0001 L CNN "ComponentHeight"
F 32 "NIC COMPONENT" H 3150 11460 60  0001 L CNN "Manufacturer1 Example"
F 33 "NRC12F1004TRF" H 3150 11370 60  0001 L CNN "Manufacturer1 Part Number"
F 34 "0.65mm" H 3150 11280 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 35 "CERN DEM JLC" H 3150 11100 60  0001 L CNN "Author"
F 36 "12/03/07 00:00:00" H 3150 11010 60  0001 L CNN "CreateDate"
F 37 "03/13/08 00:00:00" H 3150 10920 60  0001 L CNN "LatestRevisionDate"
F 38 "Resistors SMD" H 3150 10830 60  0001 L CNN "Library Name"
F 39 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 3150 10740 60  0001 L CNN "License"
	1    3150 14550
	1    0    0    -1  
$EndComp
$Comp
L power:GND #PWR?
U 1 1 5C726618
P 2350 14650
AR Path="/5BD32060/5C726618" Ref="#PWR?"  Part="1" 
AR Path="/5BABAC65/5C726618" Ref="#PWR?"  Part="1" 
AR Path="/5CC24E97/5C726618" Ref="#PWR?"  Part="1" 
AR Path="/5CC393D3/5C726618" Ref="#PWR?"  Part="1" 
AR Path="/5CC6DBF7/5C726618" Ref="#PWR?"  Part="1" 
AR Path="/5CC8AFE1/5C726618" Ref="#PWR?"  Part="1" 
AR Path="/5BCEDA3D/5C726618" Ref="#PWR?"  Part="1" 
AR Path="/5C726618" Ref="#PWR0597"  Part="1" 
F 0 "#PWR0597" H 2350 14400 50  0001 C CNN
F 1 "GND" H 2355 14477 50  0000 C CNN
F 2 "" H 2350 14650 50  0001 C CNN
F 3 "" H 2350 14650 50  0001 C CNN
	1    2350 14650
	1    0    0    -1  
$EndComp
Wire Wire Line
	2350 14550 2350 14650
Text Label 2700 14550 0    50   ~ 10
ESDSTRIP1
Text Label 3500 14550 0    50   ~ 10
ESDSTRIP2
Wire Wire Line
	3950 14550 3450 14550
Wire Wire Line
	3150 14550 2650 14550
$Comp
L power:GND #PWR?
U 1 1 5C87EA10
P 1750 9450
AR Path="/5BD32060/5C87EA10" Ref="#PWR?"  Part="1" 
AR Path="/5BABAC65/5C87EA10" Ref="#PWR?"  Part="1" 
AR Path="/5CC24E97/5C87EA10" Ref="#PWR?"  Part="1" 
AR Path="/5CC393D3/5C87EA10" Ref="#PWR?"  Part="1" 
AR Path="/5CC6DBF7/5C87EA10" Ref="#PWR?"  Part="1" 
AR Path="/5CC8AFE1/5C87EA10" Ref="#PWR?"  Part="1" 
AR Path="/5BCEDA3D/5C87EA10" Ref="#PWR?"  Part="1" 
AR Path="/5C87EA10" Ref="#PWR0595"  Part="1" 
F 0 "#PWR0595" H 1750 9200 50  0001 C CNN
F 1 "GND" H 1755 9277 50  0000 C CNN
F 2 "" H 1750 9450 50  0001 C CNN
F 3 "" H 1750 9450 50  0001 C CNN
	1    1750 9450
	1    0    0    -1  
$EndComp
$Comp
L power:GND #PWR?
U 1 1 5C8AB0E8
P 2950 9450
AR Path="/5BD32060/5C8AB0E8" Ref="#PWR?"  Part="1" 
AR Path="/5BABAC65/5C8AB0E8" Ref="#PWR?"  Part="1" 
AR Path="/5CC24E97/5C8AB0E8" Ref="#PWR?"  Part="1" 
AR Path="/5CC393D3/5C8AB0E8" Ref="#PWR?"  Part="1" 
AR Path="/5CC6DBF7/5C8AB0E8" Ref="#PWR?"  Part="1" 
AR Path="/5CC8AFE1/5C8AB0E8" Ref="#PWR?"  Part="1" 
AR Path="/5BCEDA3D/5C8AB0E8" Ref="#PWR?"  Part="1" 
AR Path="/5C8AB0E8" Ref="#PWR0596"  Part="1" 
F 0 "#PWR0596" H 2950 9200 50  0001 C CNN
F 1 "GND" H 2955 9277 50  0000 C CNN
F 2 "" H 2950 9450 50  0001 C CNN
F 3 "" H 2950 9450 50  0001 C CNN
	1    2950 9450
	1    0    0    -1  
$EndComp
Wire Wire Line
	2950 9300 2950 9450
Wire Wire Line
	1750 9200 1750 9300
Connection ~ 1750 9300
Wire Wire Line
	1750 9300 1750 9450
Wire Bus Line
	7300 9450 6800 9450
Text Label 6850 9450 0    50   ~ 10
Pmod3_[0..7]
Text Label 13650 7950 0    50   ~ 10
Pmod3_[0..7]
Wire Bus Line
	13650 7950 14200 7950
Text Label 13400 9300 2    50   ~ 10
FPGA_RTS
Text Label 13400 9400 2    50   ~ 10
FPGA_RxD
Text Label 13400 9500 2    50   ~ 10
FPGA_TxD
Wire Wire Line
	13400 9300 12950 9300
Wire Wire Line
	13400 9400 12950 9400
Wire Wire Line
	13400 9500 12950 9500
Text Label 3550 8700 0    50   ~ 10
FPGA_RTS
Text Label 3550 8600 0    50   ~ 10
FPGA_RxD
Text Label 3550 8500 0    50   ~ 10
FPGA_TxD
Wire Wire Line
	3950 8700 3450 8700
Wire Wire Line
	3950 8600 3450 8600
Wire Wire Line
	3950 8500 3450 8500
Wire Wire Line
	13400 11700 14150 11700
Wire Wire Line
	13400 11800 14150 11800
$Comp
L Pads:PLATED_HOLE2.7_PAD5.0 B2
U 1 1 5C7E4108
P 2800 15500
F 0 "B2" H 2785 15605 50  0000 C CNN
F 1 "PLATED_HOLE2.7_PAD5.0" H 2800 15330 60  0001 L CNN
F 2 "Marble:HOLE2.7_PAD5.0" H 2800 14520 60  0001 L CNN
F 3 "" H 2800 15150 60  0001 L CNN
F 4 "Plated Hole" H 2800 15060 60  0001 L CNN "Pole4"
F 5 "PLATED_HOLE2.7_PAD5.0" H 2800 15060 60  0001 L CNN "Part Number"
F 6 "Single Terminal Socket" H 2800 14970 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 2800 14880 60  0001 L CNN "Library Path"
F 8 " " H 2800 14790 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 2800 14700 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 2800 14610 60  0001 L CNN "Component Type"
F 11 "1" H 2800 14430 60  0001 L CNN "Pin Count"
F 12 " " H 2800 14340 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 2800 14250 60  0001 L CNN "Footprint Path"
F 14 "MTG270_500" H 2800 14160 60  0001 L CNN "Footprint Ref"
F 15 "Plated Hole" H 2800 14070 60  0001 L CNN "Family"
F 16 "No" H 2800 13980 60  0001 L CNN "Mounted"
F 17 "No" H 2800 13890 60  0001 L CNN "Socket"
F 18 "No" H 2800 13800 60  0001 L CNN "SMD"
F 19 "No" H 2800 13710 60  0001 L CNN "Sense"
F 20 " " H 2800 13620 60  0001 L CNN "Sense Comment"
F 21 "None" H 2800 13530 60  0001 L CNN "Status"
F 22 " " H 2800 13440 60  0001 L CNN "Status Comment"
F 23 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 2800 13260 60  0001 L CNN "Part Description"
F 24 " " H 2800 13170 60  0001 L CNN "Manufacturer"
F 25 " " H 2800 13080 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 2800 12990 60  0001 L CNN "ComponentHeight"
F 27 " " H 2800 12900 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 2800 12810 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 2800 12720 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 2800 12450 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 2800 12270 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JMW" H 2800 12180 60  0001 L CNN "Author"
F 33 "09/27/11 00:00:00" H 2800 12090 60  0001 L CNN "CreateDate"
F 34 "09/27/11 00:00:00" H 2800 12000 60  0001 L CNN "LatestRevisionDate"
F 35 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 2800 11910 60  0001 L CNN "PackageDescription"
F 36 "Eletro-mechanical.DbLib" H 2800 11820 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 2800 11730 60  0001 L CNN "License"
F 38 "dnf" H 2800 15500 50  0001 C CNN "config"
	1    2800 15500
	1    0    0    -1  
$EndComp
$Comp
L Pads:PLATED_HOLE2.7_PAD5.0 B4
U 1 1 5C874F76
P 2950 15500
F 0 "B4" H 2935 15605 50  0000 C CNN
F 1 "PLATED_HOLE2.7_PAD5.0" H 2950 15330 60  0001 L CNN
F 2 "Marble:HOLE2.7_PAD5.0" H 2950 14520 60  0001 L CNN
F 3 "" H 2950 15150 60  0001 L CNN
F 4 "Plated Hole" H 2950 15060 60  0001 L CNN "Pole4"
F 5 "PLATED_HOLE2.7_PAD5.0" H 2950 15060 60  0001 L CNN "Part Number"
F 6 "Single Terminal Socket" H 2950 14970 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 2950 14880 60  0001 L CNN "Library Path"
F 8 " " H 2950 14790 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 2950 14700 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 2950 14610 60  0001 L CNN "Component Type"
F 11 "1" H 2950 14430 60  0001 L CNN "Pin Count"
F 12 " " H 2950 14340 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 2950 14250 60  0001 L CNN "Footprint Path"
F 14 "MTG270_500" H 2950 14160 60  0001 L CNN "Footprint Ref"
F 15 "Plated Hole" H 2950 14070 60  0001 L CNN "Family"
F 16 "No" H 2950 13980 60  0001 L CNN "Mounted"
F 17 "No" H 2950 13890 60  0001 L CNN "Socket"
F 18 "No" H 2950 13800 60  0001 L CNN "SMD"
F 19 "No" H 2950 13710 60  0001 L CNN "Sense"
F 20 " " H 2950 13620 60  0001 L CNN "Sense Comment"
F 21 "None" H 2950 13530 60  0001 L CNN "Status"
F 22 " " H 2950 13440 60  0001 L CNN "Status Comment"
F 23 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 2950 13260 60  0001 L CNN "Part Description"
F 24 " " H 2950 13170 60  0001 L CNN "Manufacturer"
F 25 " " H 2950 13080 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 2950 12990 60  0001 L CNN "ComponentHeight"
F 27 " " H 2950 12900 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 2950 12810 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 2950 12720 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 2950 12450 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 2950 12270 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JMW" H 2950 12180 60  0001 L CNN "Author"
F 33 "09/27/11 00:00:00" H 2950 12090 60  0001 L CNN "CreateDate"
F 34 "09/27/11 00:00:00" H 2950 12000 60  0001 L CNN "LatestRevisionDate"
F 35 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 2950 11910 60  0001 L CNN "PackageDescription"
F 36 "Eletro-mechanical.DbLib" H 2950 11820 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 2950 11730 60  0001 L CNN "License"
F 38 "dnf" H 2950 15500 50  0001 C CNN "config"
	1    2950 15500
	1    0    0    -1  
$EndComp
$Comp
L Pads:PLATED_HOLE2.7_PAD5.0 B6
U 1 1 5C8A4093
P 3100 15500
F 0 "B6" H 3085 15605 50  0000 C CNN
F 1 "PLATED_HOLE2.7_PAD5.0" H 3100 15330 60  0001 L CNN
F 2 "Marble:HOLE2.7_PAD5.0" H 3100 14520 60  0001 L CNN
F 3 "" H 3100 15150 60  0001 L CNN
F 4 "Plated Hole" H 3100 15060 60  0001 L CNN "Pole4"
F 5 "PLATED_HOLE2.7_PAD5.0" H 3100 15060 60  0001 L CNN "Part Number"
F 6 "Single Terminal Socket" H 3100 14970 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 3100 14880 60  0001 L CNN "Library Path"
F 8 " " H 3100 14790 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 3100 14700 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 3100 14610 60  0001 L CNN "Component Type"
F 11 "1" H 3100 14430 60  0001 L CNN "Pin Count"
F 12 " " H 3100 14340 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 3100 14250 60  0001 L CNN "Footprint Path"
F 14 "MTG270_500" H 3100 14160 60  0001 L CNN "Footprint Ref"
F 15 "Plated Hole" H 3100 14070 60  0001 L CNN "Family"
F 16 "No" H 3100 13980 60  0001 L CNN "Mounted"
F 17 "No" H 3100 13890 60  0001 L CNN "Socket"
F 18 "No" H 3100 13800 60  0001 L CNN "SMD"
F 19 "No" H 3100 13710 60  0001 L CNN "Sense"
F 20 " " H 3100 13620 60  0001 L CNN "Sense Comment"
F 21 "None" H 3100 13530 60  0001 L CNN "Status"
F 22 " " H 3100 13440 60  0001 L CNN "Status Comment"
F 23 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 3100 13260 60  0001 L CNN "Part Description"
F 24 " " H 3100 13170 60  0001 L CNN "Manufacturer"
F 25 " " H 3100 13080 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 3100 12990 60  0001 L CNN "ComponentHeight"
F 27 " " H 3100 12900 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 3100 12810 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 3100 12720 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 3100 12450 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 3100 12270 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JMW" H 3100 12180 60  0001 L CNN "Author"
F 33 "09/27/11 00:00:00" H 3100 12090 60  0001 L CNN "CreateDate"
F 34 "09/27/11 00:00:00" H 3100 12000 60  0001 L CNN "LatestRevisionDate"
F 35 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 3100 11910 60  0001 L CNN "PackageDescription"
F 36 "Eletro-mechanical.DbLib" H 3100 11820 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 3100 11730 60  0001 L CNN "License"
F 38 "dnf" H 3100 15500 50  0001 C CNN "config"
	1    3100 15500
	1    0    0    -1  
$EndComp
$Comp
L Pads:PLATED_HOLE2.7_PAD5.0 B8
U 1 1 5C8D5D72
P 3250 15500
F 0 "B8" H 3235 15605 50  0000 C CNN
F 1 "PLATED_HOLE2.7_PAD5.0" H 3250 15330 60  0001 L CNN
F 2 "Marble:HOLE2.7_PAD5.0" H 3250 14520 60  0001 L CNN
F 3 "" H 3250 15150 60  0001 L CNN
F 4 "Plated Hole" H 3250 15060 60  0001 L CNN "Pole4"
F 5 "PLATED_HOLE2.7_PAD5.0" H 3250 15060 60  0001 L CNN "Part Number"
F 6 "Single Terminal Socket" H 3250 14970 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 3250 14880 60  0001 L CNN "Library Path"
F 8 " " H 3250 14790 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 3250 14700 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 3250 14610 60  0001 L CNN "Component Type"
F 11 "1" H 3250 14430 60  0001 L CNN "Pin Count"
F 12 " " H 3250 14340 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 3250 14250 60  0001 L CNN "Footprint Path"
F 14 "MTG270_500" H 3250 14160 60  0001 L CNN "Footprint Ref"
F 15 "Plated Hole" H 3250 14070 60  0001 L CNN "Family"
F 16 "No" H 3250 13980 60  0001 L CNN "Mounted"
F 17 "No" H 3250 13890 60  0001 L CNN "Socket"
F 18 "No" H 3250 13800 60  0001 L CNN "SMD"
F 19 "No" H 3250 13710 60  0001 L CNN "Sense"
F 20 " " H 3250 13620 60  0001 L CNN "Sense Comment"
F 21 "None" H 3250 13530 60  0001 L CNN "Status"
F 22 " " H 3250 13440 60  0001 L CNN "Status Comment"
F 23 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 3250 13260 60  0001 L CNN "Part Description"
F 24 " " H 3250 13170 60  0001 L CNN "Manufacturer"
F 25 " " H 3250 13080 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 3250 12990 60  0001 L CNN "ComponentHeight"
F 27 " " H 3250 12900 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 3250 12810 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 3250 12720 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 3250 12450 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 3250 12270 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JMW" H 3250 12180 60  0001 L CNN "Author"
F 33 "09/27/11 00:00:00" H 3250 12090 60  0001 L CNN "CreateDate"
F 34 "09/27/11 00:00:00" H 3250 12000 60  0001 L CNN "LatestRevisionDate"
F 35 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 3250 11910 60  0001 L CNN "PackageDescription"
F 36 "Eletro-mechanical.DbLib" H 3250 11820 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 3250 11730 60  0001 L CNN "License"
F 38 "dnf" H 3250 15500 50  0001 C CNN "config"
	1    3250 15500
	1    0    0    -1  
$EndComp
$Comp
L Pads:PLATED_HOLE2.7_PAD5.0 B1
U 1 1 5C942131
P 2800 15250
F 0 "B1" H 2785 15355 50  0000 C CNN
F 1 "PLATED_HOLE2.7_PAD5.0" H 2800 15080 60  0001 L CNN
F 2 "Marble:HOLE2.7_PAD5.0" H 2800 14270 60  0001 L CNN
F 3 "" H 2800 14900 60  0001 L CNN
F 4 "Plated Hole" H 2800 14810 60  0001 L CNN "Pole4"
F 5 "PLATED_HOLE2.7_PAD5.0" H 2800 14810 60  0001 L CNN "Part Number"
F 6 "Single Terminal Socket" H 2800 14720 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 2800 14630 60  0001 L CNN "Library Path"
F 8 " " H 2800 14540 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 2800 14450 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 2800 14360 60  0001 L CNN "Component Type"
F 11 "1" H 2800 14180 60  0001 L CNN "Pin Count"
F 12 " " H 2800 14090 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 2800 14000 60  0001 L CNN "Footprint Path"
F 14 "MTG270_500" H 2800 13910 60  0001 L CNN "Footprint Ref"
F 15 "Plated Hole" H 2800 13820 60  0001 L CNN "Family"
F 16 "No" H 2800 13730 60  0001 L CNN "Mounted"
F 17 "No" H 2800 13640 60  0001 L CNN "Socket"
F 18 "No" H 2800 13550 60  0001 L CNN "SMD"
F 19 "No" H 2800 13460 60  0001 L CNN "Sense"
F 20 " " H 2800 13370 60  0001 L CNN "Sense Comment"
F 21 "None" H 2800 13280 60  0001 L CNN "Status"
F 22 " " H 2800 13190 60  0001 L CNN "Status Comment"
F 23 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 2800 13010 60  0001 L CNN "Part Description"
F 24 " " H 2800 12920 60  0001 L CNN "Manufacturer"
F 25 " " H 2800 12830 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 2800 12740 60  0001 L CNN "ComponentHeight"
F 27 " " H 2800 12650 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 2800 12560 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 2800 12470 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 2800 12200 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 2800 12020 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JMW" H 2800 11930 60  0001 L CNN "Author"
F 33 "09/27/11 00:00:00" H 2800 11840 60  0001 L CNN "CreateDate"
F 34 "09/27/11 00:00:00" H 2800 11750 60  0001 L CNN "LatestRevisionDate"
F 35 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 2800 11660 60  0001 L CNN "PackageDescription"
F 36 "Eletro-mechanical.DbLib" H 2800 11570 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 2800 11480 60  0001 L CNN "License"
F 38 "dnf" H 2800 15250 50  0001 C CNN "config"
	1    2800 15250
	1    0    0    -1  
$EndComp
$Comp
L Pads:PLATED_HOLE2.7_PAD5.0 B3
U 1 1 5C94215D
P 2950 15250
F 0 "B3" H 2935 15355 50  0000 C CNN
F 1 "PLATED_HOLE2.7_PAD5.0" H 2950 15080 60  0001 L CNN
F 2 "Marble:HOLE2.7_PAD5.0" H 2950 14270 60  0001 L CNN
F 3 "" H 2950 14900 60  0001 L CNN
F 4 "Plated Hole" H 2950 14810 60  0001 L CNN "Pole4"
F 5 "PLATED_HOLE2.7_PAD5.0" H 2950 14810 60  0001 L CNN "Part Number"
F 6 "Single Terminal Socket" H 2950 14720 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 2950 14630 60  0001 L CNN "Library Path"
F 8 " " H 2950 14540 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 2950 14450 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 2950 14360 60  0001 L CNN "Component Type"
F 11 "1" H 2950 14180 60  0001 L CNN "Pin Count"
F 12 " " H 2950 14090 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 2950 14000 60  0001 L CNN "Footprint Path"
F 14 "MTG270_500" H 2950 13910 60  0001 L CNN "Footprint Ref"
F 15 "Plated Hole" H 2950 13820 60  0001 L CNN "Family"
F 16 "No" H 2950 13730 60  0001 L CNN "Mounted"
F 17 "No" H 2950 13640 60  0001 L CNN "Socket"
F 18 "No" H 2950 13550 60  0001 L CNN "SMD"
F 19 "No" H 2950 13460 60  0001 L CNN "Sense"
F 20 " " H 2950 13370 60  0001 L CNN "Sense Comment"
F 21 "None" H 2950 13280 60  0001 L CNN "Status"
F 22 " " H 2950 13190 60  0001 L CNN "Status Comment"
F 23 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 2950 13010 60  0001 L CNN "Part Description"
F 24 " " H 2950 12920 60  0001 L CNN "Manufacturer"
F 25 " " H 2950 12830 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 2950 12740 60  0001 L CNN "ComponentHeight"
F 27 " " H 2950 12650 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 2950 12560 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 2950 12470 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 2950 12200 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 2950 12020 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JMW" H 2950 11930 60  0001 L CNN "Author"
F 33 "09/27/11 00:00:00" H 2950 11840 60  0001 L CNN "CreateDate"
F 34 "09/27/11 00:00:00" H 2950 11750 60  0001 L CNN "LatestRevisionDate"
F 35 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 2950 11660 60  0001 L CNN "PackageDescription"
F 36 "Eletro-mechanical.DbLib" H 2950 11570 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 2950 11480 60  0001 L CNN "License"
F 38 "dnf" H 2950 15250 50  0001 C CNN "config"
	1    2950 15250
	1    0    0    -1  
$EndComp
$Comp
L Pads:PLATED_HOLE2.7_PAD5.0 B5
U 1 1 5C942189
P 3100 15250
F 0 "B5" H 3085 15355 50  0000 C CNN
F 1 "PLATED_HOLE2.7_PAD5.0" H 3100 15080 60  0001 L CNN
F 2 "Marble:HOLE2.7_PAD5.0" H 3100 14270 60  0001 L CNN
F 3 "" H 3100 14900 60  0001 L CNN
F 4 "Plated Hole" H 3100 14810 60  0001 L CNN "Pole4"
F 5 "PLATED_HOLE2.7_PAD5.0" H 3100 14810 60  0001 L CNN "Part Number"
F 6 "Single Terminal Socket" H 3100 14720 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 3100 14630 60  0001 L CNN "Library Path"
F 8 " " H 3100 14540 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 3100 14450 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 3100 14360 60  0001 L CNN "Component Type"
F 11 "1" H 3100 14180 60  0001 L CNN "Pin Count"
F 12 " " H 3100 14090 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 3100 14000 60  0001 L CNN "Footprint Path"
F 14 "MTG270_500" H 3100 13910 60  0001 L CNN "Footprint Ref"
F 15 "Plated Hole" H 3100 13820 60  0001 L CNN "Family"
F 16 "No" H 3100 13730 60  0001 L CNN "Mounted"
F 17 "No" H 3100 13640 60  0001 L CNN "Socket"
F 18 "No" H 3100 13550 60  0001 L CNN "SMD"
F 19 "No" H 3100 13460 60  0001 L CNN "Sense"
F 20 " " H 3100 13370 60  0001 L CNN "Sense Comment"
F 21 "None" H 3100 13280 60  0001 L CNN "Status"
F 22 " " H 3100 13190 60  0001 L CNN "Status Comment"
F 23 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 3100 13010 60  0001 L CNN "Part Description"
F 24 " " H 3100 12920 60  0001 L CNN "Manufacturer"
F 25 " " H 3100 12830 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 3100 12740 60  0001 L CNN "ComponentHeight"
F 27 " " H 3100 12650 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 3100 12560 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 3100 12470 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 3100 12200 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 3100 12020 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JMW" H 3100 11930 60  0001 L CNN "Author"
F 33 "09/27/11 00:00:00" H 3100 11840 60  0001 L CNN "CreateDate"
F 34 "09/27/11 00:00:00" H 3100 11750 60  0001 L CNN "LatestRevisionDate"
F 35 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 3100 11660 60  0001 L CNN "PackageDescription"
F 36 "Eletro-mechanical.DbLib" H 3100 11570 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 3100 11480 60  0001 L CNN "License"
F 38 "dnf" H 3100 15250 50  0001 C CNN "config"
	1    3100 15250
	1    0    0    -1  
$EndComp
$Comp
L Pads:PLATED_HOLE2.7_PAD5.0 B7
U 1 1 5C9421B5
P 3250 15250
F 0 "B7" H 3235 15355 50  0000 C CNN
F 1 "PLATED_HOLE2.7_PAD5.0" H 3250 15080 60  0001 L CNN
F 2 "Marble:HOLE2.7_PAD5.0" H 3250 14270 60  0001 L CNN
F 3 "" H 3250 14900 60  0001 L CNN
F 4 "Plated Hole" H 3250 14810 60  0001 L CNN "Pole4"
F 5 "PLATED_HOLE2.7_PAD5.0" H 3250 14810 60  0001 L CNN "Part Number"
F 6 "Single Terminal Socket" H 3250 14720 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 3250 14630 60  0001 L CNN "Library Path"
F 8 " " H 3250 14540 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 3250 14450 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 3250 14360 60  0001 L CNN "Component Type"
F 11 "1" H 3250 14180 60  0001 L CNN "Pin Count"
F 12 " " H 3250 14090 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 3250 14000 60  0001 L CNN "Footprint Path"
F 14 "MTG270_500" H 3250 13910 60  0001 L CNN "Footprint Ref"
F 15 "Plated Hole" H 3250 13820 60  0001 L CNN "Family"
F 16 "No" H 3250 13730 60  0001 L CNN "Mounted"
F 17 "No" H 3250 13640 60  0001 L CNN "Socket"
F 18 "No" H 3250 13550 60  0001 L CNN "SMD"
F 19 "No" H 3250 13460 60  0001 L CNN "Sense"
F 20 " " H 3250 13370 60  0001 L CNN "Sense Comment"
F 21 "None" H 3250 13280 60  0001 L CNN "Status"
F 22 " " H 3250 13190 60  0001 L CNN "Status Comment"
F 23 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 3250 13010 60  0001 L CNN "Part Description"
F 24 " " H 3250 12920 60  0001 L CNN "Manufacturer"
F 25 " " H 3250 12830 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 3250 12740 60  0001 L CNN "ComponentHeight"
F 27 " " H 3250 12650 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 3250 12560 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 3250 12470 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 3250 12200 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 3250 12020 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JMW" H 3250 11930 60  0001 L CNN "Author"
F 33 "09/27/11 00:00:00" H 3250 11840 60  0001 L CNN "CreateDate"
F 34 "09/27/11 00:00:00" H 3250 11750 60  0001 L CNN "LatestRevisionDate"
F 35 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 3250 11660 60  0001 L CNN "PackageDescription"
F 36 "Eletro-mechanical.DbLib" H 3250 11570 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 3250 11480 60  0001 L CNN "License"
F 38 "dnf" H 3250 15250 50  0001 C CNN "config"
	1    3250 15250
	1    0    0    -1  
$EndComp
Wire Wire Line
	8500 7300 6800 7300
Wire Wire Line
	8500 9100 7000 9100
Wire Wire Line
	7000 9100 7000 9150
Wire Wire Line
	7000 9150 6800 9150
$Sheet
S 8500 6150 1550 1550
U 5BD31F9A
F0 "FMC_1" 50
F1 "FMC_1.sch" 50
F2 "FMC1_GBTCLK0_M2C_P" O R 10050 7050 50 
F3 "FMC1_GBTCLK0_M2C_N" O R 10050 7150 50 
F4 "FMC1_CLK1_M2C_P" O R 10050 7300 50 
F5 "FMC1_CLK1_M2C_N" O R 10050 7400 50 
F6 "FMC1_CLK0_M2C_P" O R 10050 7550 50 
F7 "FMC1_CLK0_M2C_N" O R 10050 7650 50 
F8 "FMC1_PRSNT_M2C_L" O L 8500 6450 50 
F9 "I2C_FMC1_SCL" I L 8500 6550 50 
F10 "I2C_FMC1_SDA" B L 8500 6650 50 
F11 "FMC1_TCK" I L 8500 6800 50 
F12 "FMC1_TDI" I L 8500 6900 50 
F13 "FMC1_TDO" O L 8500 7000 50 
F14 "FMC1_TMS" I L 8500 7100 50 
F15 "FMC1_TRST" I L 8500 7200 50 
F16 "FMC1_PG_C2M" O L 8500 6350 50 
F17 "FMC1_FUSE" O L 8500 7300 50 
$EndSheet
$Comp
L power:GND #PWR?
U 1 1 5D64BA99
P 3450 15250
AR Path="/5BD32060/5D64BA99" Ref="#PWR?"  Part="1" 
AR Path="/5BABAC65/5D64BA99" Ref="#PWR?"  Part="1" 
AR Path="/5CC24E97/5D64BA99" Ref="#PWR?"  Part="1" 
AR Path="/5CC393D3/5D64BA99" Ref="#PWR?"  Part="1" 
AR Path="/5CC6DBF7/5D64BA99" Ref="#PWR?"  Part="1" 
AR Path="/5CC8AFE1/5D64BA99" Ref="#PWR?"  Part="1" 
AR Path="/5BCEDA3D/5D64BA99" Ref="#PWR?"  Part="1" 
AR Path="/5D64BA99" Ref="#PWR0266"  Part="1" 
F 0 "#PWR0266" H 3450 15000 50  0001 C CNN
F 1 "GND" H 3455 15077 50  0000 C CNN
F 2 "" H 3450 15250 50  0001 C CNN
F 3 "" H 3450 15250 50  0001 C CNN
	1    3450 15250
	1    0    0    -1  
$EndComp
$Comp
L power:GND #PWR?
U 1 1 5D67B2EB
P 3450 15500
AR Path="/5BD32060/5D67B2EB" Ref="#PWR?"  Part="1" 
AR Path="/5BABAC65/5D67B2EB" Ref="#PWR?"  Part="1" 
AR Path="/5CC24E97/5D67B2EB" Ref="#PWR?"  Part="1" 
AR Path="/5CC393D3/5D67B2EB" Ref="#PWR?"  Part="1" 
AR Path="/5CC6DBF7/5D67B2EB" Ref="#PWR?"  Part="1" 
AR Path="/5CC8AFE1/5D67B2EB" Ref="#PWR?"  Part="1" 
AR Path="/5BCEDA3D/5D67B2EB" Ref="#PWR?"  Part="1" 
AR Path="/5D67B2EB" Ref="#PWR0467"  Part="1" 
F 0 "#PWR0467" H 3450 15250 50  0001 C CNN
F 1 "GND" H 3455 15327 50  0000 C CNN
F 2 "" H 3450 15500 50  0001 C CNN
F 3 "" H 3450 15500 50  0001 C CNN
	1    3450 15500
	1    0    0    -1  
$EndComp
Wire Wire Line
	2800 15500 2950 15500
Wire Wire Line
	2950 15500 3100 15500
Connection ~ 2950 15500
Wire Wire Line
	3100 15500 3250 15500
Connection ~ 3100 15500
Wire Wire Line
	2800 15250 2950 15250
Wire Wire Line
	2950 15250 3100 15250
Connection ~ 2950 15250
Wire Wire Line
	3100 15250 3250 15250
Connection ~ 3100 15250
$Comp
L Pads:FIDUCIAL_TARGET_C100-200 FTG1
U 1 1 5CE2E544
P 2800 14900
F 0 "FTG1" H 2888 14900 50  0000 L CNN
F 1 "FIDUCIAL_TARGET_C100-200" H 2800 14750 60  0001 L CNN
F 2 "Marble:FIDUCIAL_TOP_S200-400" H 2800 13940 60  0001 L CNN
F 3 "" H 2800 14570 60  0001 L CNN
F 4 " " H 2800 14480 60  0001 L CNN "Pole4"
F 5 "FIDUCIAL_TARGET_C100-200" H 2800 14480 60  0001 L CNN "Part Number"
F 6 "Fiducial Target" H 2800 14390 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 2800 14300 60  0001 L CNN "Library Path"
F 8 " " H 2800 14210 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 2800 14120 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 2800 14030 60  0001 L CNN "Component Type"
F 11 "1" H 2800 13850 60  0001 L CNN "Pin Count"
F 12 " " H 2800 13760 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 2800 13670 60  0001 L CNN "Footprint Path"
F 14 "FIDUCIAL_TOP_C100-200" H 2800 13580 60  0001 L CNN "Footprint Ref"
F 15 "Fiducial" H 2800 13490 60  0001 L CNN "Family"
F 16 "No" H 2800 13400 60  0001 L CNN "Mounted"
F 17 "No" H 2800 13310 60  0001 L CNN "Socket"
F 18 "Yes" H 2800 13220 60  0001 L CNN "SMD"
F 19 "No" H 2800 13130 60  0001 L CNN "Sense"
F 20 " " H 2800 13040 60  0001 L CNN "Sense Comment"
F 21 "None" H 2800 12950 60  0001 L CNN "Status"
F 22 " " H 2800 12860 60  0001 L CNN "Status Comment"
F 23 "Round Fiducial Target, Top Layer, 1.0mm, Top Solder 2.0mm, Keepout =2.0mm" H 2800 12680 60  0001 L CNN "Part Description"
F 24 " " H 2800 12590 60  0001 L CNN "Manufacturer"
F 25 " " H 2800 12500 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 2800 12410 60  0001 L CNN "ComponentHeight"
F 27 " " H 2800 12320 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 2800 12230 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 2800 12140 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 2800 11870 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 2800 11690 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JLC" H 2800 11600 60  0001 L CNN "Author"
F 33 "02/09/10 00:00:00" H 2800 11510 60  0001 L CNN "CreateDate"
F 34 "04/04/12 00:00:00" H 2800 11420 60  0001 L CNN "LatestRevisionDate"
F 35 "Round Fiducial Target, Top Layer, 1.0mm, Top Solder 2.0mm, Keepout =2.0mm" H 2800 11330 60  0001 L CNN "PackageDescription"
F 36 "Pads" H 2800 11240 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 2800 11150 60  0001 L CNN "License"
	1    2800 14900
	1    0    0    -1  
$EndComp
$Comp
L Pads:FIDUCIAL_TARGET_C100-200 FTG2
U 1 1 5CE31A16
P 3150 14900
F 0 "FTG2" H 3238 14900 50  0000 L CNN
F 1 "FIDUCIAL_TARGET_C100-200" H 3150 14750 60  0001 L CNN
F 2 "Marble:FIDUCIAL_TOP_S200-400" H 3150 13940 60  0001 L CNN
F 3 "" H 3150 14570 60  0001 L CNN
F 4 " " H 3150 14480 60  0001 L CNN "Pole4"
F 5 "FIDUCIAL_TARGET_C100-200" H 3150 14480 60  0001 L CNN "Part Number"
F 6 "Fiducial Target" H 3150 14390 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 3150 14300 60  0001 L CNN "Library Path"
F 8 " " H 3150 14210 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 3150 14120 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 3150 14030 60  0001 L CNN "Component Type"
F 11 "1" H 3150 13850 60  0001 L CNN "Pin Count"
F 12 " " H 3150 13760 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 3150 13670 60  0001 L CNN "Footprint Path"
F 14 "FIDUCIAL_TOP_C100-200" H 3150 13580 60  0001 L CNN "Footprint Ref"
F 15 "Fiducial" H 3150 13490 60  0001 L CNN "Family"
F 16 "No" H 3150 13400 60  0001 L CNN "Mounted"
F 17 "No" H 3150 13310 60  0001 L CNN "Socket"
F 18 "Yes" H 3150 13220 60  0001 L CNN "SMD"
F 19 "No" H 3150 13130 60  0001 L CNN "Sense"
F 20 " " H 3150 13040 60  0001 L CNN "Sense Comment"
F 21 "None" H 3150 12950 60  0001 L CNN "Status"
F 22 " " H 3150 12860 60  0001 L CNN "Status Comment"
F 23 "Round Fiducial Target, Top Layer, 1.0mm, Top Solder 2.0mm, Keepout =2.0mm" H 3150 12680 60  0001 L CNN "Part Description"
F 24 " " H 3150 12590 60  0001 L CNN "Manufacturer"
F 25 " " H 3150 12500 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 3150 12410 60  0001 L CNN "ComponentHeight"
F 27 " " H 3150 12320 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 3150 12230 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 3150 12140 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 3150 11870 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 3150 11690 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JLC" H 3150 11600 60  0001 L CNN "Author"
F 33 "02/09/10 00:00:00" H 3150 11510 60  0001 L CNN "CreateDate"
F 34 "04/04/12 00:00:00" H 3150 11420 60  0001 L CNN "LatestRevisionDate"
F 35 "Round Fiducial Target, Top Layer, 1.0mm, Top Solder 2.0mm, Keepout =2.0mm" H 3150 11330 60  0001 L CNN "PackageDescription"
F 36 "Pads" H 3150 11240 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 3150 11150 60  0001 L CNN "License"
	1    3150 14900
	1    0    0    -1  
$EndComp
$Comp
L Pads:FIDUCIAL_TARGET_C100-200 FTG3
U 1 1 5CE32256
P 3500 14900
F 0 "FTG3" H 3588 14900 50  0000 L CNN
F 1 "FIDUCIAL_TARGET_C100-200" H 3500 14750 60  0001 L CNN
F 2 "Marble:FIDUCIAL_BOT_S200-400" H 3500 13940 60  0001 L CNN
F 3 "" H 3500 14570 60  0001 L CNN
F 4 " " H 3500 14480 60  0001 L CNN "Pole4"
F 5 "FIDUCIAL_TARGET_C100-200" H 3500 14480 60  0001 L CNN "Part Number"
F 6 "Fiducial Target" H 3500 14390 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 3500 14300 60  0001 L CNN "Library Path"
F 8 " " H 3500 14210 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 3500 14120 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 3500 14030 60  0001 L CNN "Component Type"
F 11 "1" H 3500 13850 60  0001 L CNN "Pin Count"
F 12 " " H 3500 13760 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 3500 13670 60  0001 L CNN "Footprint Path"
F 14 "FIDUCIAL_TOP_C100-200" H 3500 13580 60  0001 L CNN "Footprint Ref"
F 15 "Fiducial" H 3500 13490 60  0001 L CNN "Family"
F 16 "No" H 3500 13400 60  0001 L CNN "Mounted"
F 17 "No" H 3500 13310 60  0001 L CNN "Socket"
F 18 "Yes" H 3500 13220 60  0001 L CNN "SMD"
F 19 "No" H 3500 13130 60  0001 L CNN "Sense"
F 20 " " H 3500 13040 60  0001 L CNN "Sense Comment"
F 21 "None" H 3500 12950 60  0001 L CNN "Status"
F 22 " " H 3500 12860 60  0001 L CNN "Status Comment"
F 23 "Round Fiducial Target, Top Layer, 1.0mm, Top Solder 2.0mm, Keepout =2.0mm" H 3500 12680 60  0001 L CNN "Part Description"
F 24 " " H 3500 12590 60  0001 L CNN "Manufacturer"
F 25 " " H 3500 12500 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 3500 12410 60  0001 L CNN "ComponentHeight"
F 27 " " H 3500 12320 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 3500 12230 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 3500 12140 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 3500 11870 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 3500 11690 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JLC" H 3500 11600 60  0001 L CNN "Author"
F 33 "02/09/10 00:00:00" H 3500 11510 60  0001 L CNN "CreateDate"
F 34 "04/04/12 00:00:00" H 3500 11420 60  0001 L CNN "LatestRevisionDate"
F 35 "Round Fiducial Target, Top Layer, 1.0mm, Top Solder 2.0mm, Keepout =2.0mm" H 3500 11330 60  0001 L CNN "PackageDescription"
F 36 "Pads" H 3500 11240 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 3500 11150 60  0001 L CNN "License"
	1    3500 14900
	1    0    0    -1  
$EndComp
$Comp
L Pads:FIDUCIAL_TARGET_C100-200 FTG4
U 1 1 5CE3274F
P 3850 14900
F 0 "FTG4" H 3938 14900 50  0000 L CNN
F 1 "Pads:FIDUCIAL_BOT_S200-400" H 3850 14750 60  0001 L CNN
F 2 "Marble:FIDUCIAL_BOT_S200-400" H 3850 13940 60  0001 L CNN
F 3 "" H 3850 14570 60  0001 L CNN
F 4 " " H 3850 14480 60  0001 L CNN "Pole4"
F 5 "FIDUCIAL_TARGET_C100-200" H 3850 14480 60  0001 L CNN "Part Number"
F 6 "Fiducial Target" H 3850 14390 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 3850 14300 60  0001 L CNN "Library Path"
F 8 " " H 3850 14210 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 3850 14120 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 3850 14030 60  0001 L CNN "Component Type"
F 11 "1" H 3850 13850 60  0001 L CNN "Pin Count"
F 12 " " H 3850 13760 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 3850 13670 60  0001 L CNN "Footprint Path"
F 14 "FIDUCIAL_TOP_C100-200" H 3850 13580 60  0001 L CNN "Footprint Ref"
F 15 "Fiducial" H 3850 13490 60  0001 L CNN "Family"
F 16 "No" H 3850 13400 60  0001 L CNN "Mounted"
F 17 "No" H 3850 13310 60  0001 L CNN "Socket"
F 18 "Yes" H 3850 13220 60  0001 L CNN "SMD"
F 19 "No" H 3850 13130 60  0001 L CNN "Sense"
F 20 " " H 3850 13040 60  0001 L CNN "Sense Comment"
F 21 "None" H 3850 12950 60  0001 L CNN "Status"
F 22 " " H 3850 12860 60  0001 L CNN "Status Comment"
F 23 "Round Fiducial Target, Top Layer, 1.0mm, Top Solder 2.0mm, Keepout =2.0mm" H 3850 12680 60  0001 L CNN "Part Description"
F 24 " " H 3850 12590 60  0001 L CNN "Manufacturer"
F 25 " " H 3850 12500 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 3850 12410 60  0001 L CNN "ComponentHeight"
F 27 " " H 3850 12320 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 3850 12230 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 3850 12140 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 3850 11870 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 3850 11690 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JLC" H 3850 11600 60  0001 L CNN "Author"
F 33 "02/09/10 00:00:00" H 3850 11510 60  0001 L CNN "CreateDate"
F 34 "04/04/12 00:00:00" H 3850 11420 60  0001 L CNN "LatestRevisionDate"
F 35 "Round Fiducial Target, Top Layer, 1.0mm, Top Solder 2.0mm, Keepout =2.0mm" H 3850 11330 60  0001 L CNN "PackageDescription"
F 36 "Pads" H 3850 11240 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 3850 11150 60  0001 L CNN "License"
	1    3850 14900
	1    0    0    -1  
$EndComp
NoConn ~ 3950 14550
Wire Notes Line
	12350 7900 12350 6800
Wire Notes Line
	12350 6800 11350 6800
Wire Notes Line
	12350 8550 11350 8550
Wire Notes Line
	12150 9550 12150 12150
Wire Notes Line
	11350 12150 12150 12150
Text Notes 11600 9650 0    50   ~ 10
MISC
Text Notes 12600 8600 0    50   ~ 10
MISC
Text Notes 11500 5350 0    50   ~ 10
CLK
Wire Notes Line
	11900 5200 11350 5200
Wire Wire Line
	2950 9200 5200 9200
Text Label 4750 8200 0    50   ~ 10
FMC_TCK
Text Label 4750 8300 0    50   ~ 10
FMC_TDI
Text Label 4750 8400 0    50   ~ 10
FMC_TDO
Text Label 4750 8500 0    50   ~ 10
FMC_TMS
Text Label 4750 8600 0    50   ~ 10
FMC_TRST
Wire Wire Line
	4650 8200 5200 8200
Wire Wire Line
	4650 8300 5200 8300
Wire Wire Line
	4650 8400 5200 8400
Wire Wire Line
	4650 8500 5200 8500
Wire Wire Line
	4650 8600 5200 8600
Wire Wire Line
	4050 4850 5400 4850
Wire Wire Line
	5400 5750 11350 5750
Wire Wire Line
	4050 4950 5300 4950
Wire Wire Line
	5300 5850 11350 5850
Wire Wire Line
	5700 4600 5700 5500
Wire Wire Line
	5600 4700 5600 5600
Wire Wire Line
	5400 4850 5400 5750
Wire Wire Line
	5300 4950 5300 5850
Wire Notes Line
	11900 6250 11350 6250
Wire Notes Line
	11900 5200 11900 6250
Wire Wire Line
	4050 5100 5150 5100
Wire Wire Line
	5150 5100 5150 5950
Wire Wire Line
	5150 5950 10850 5950
Wire Wire Line
	10850 5950 10850 6050
Wire Wire Line
	10850 6050 11350 6050
Wire Wire Line
	4050 5200 5050 5200
Wire Wire Line
	5050 5200 5050 6050
Wire Wire Line
	10700 6050 10700 6150
Wire Wire Line
	10700 6150 11350 6150
Wire Wire Line
	5050 6050 10700 6050
Wire Wire Line
	13250 11900 14150 11900
Text Label 13250 11900 0    50   ~ 10
FMC1_PRSNT_Override
Text Label 13250 12000 0    50   ~ 10
FMC2_PRSNT_Override
Wire Wire Line
	13250 12000 14150 12000
Wire Wire Line
	7750 6450 8500 6450
Wire Wire Line
	7750 8250 8500 8250
$Sheet
S 5200 6650 1600 4050
U 5BCEDA39
F0 "MMC" 50
F1 "MMC.sch" 50
F2 "BOOT_MODE[0..2]" I R 6800 10650 50 
F3 "SDRAM_PGOOD" I R 6800 6750 50 
F4 "AMC_GA[0..2]" I L 5200 7000 50 
F5 "FMC2_PG_C2M" I R 6800 8150 50 
F6 "FMC1_PG_C2M" I R 6800 7100 50 
F7 "LPC_ISPn" I L 5200 8100 50 
F8 "AMC_En" I L 5200 7300 50 
F9 "FPGA_RESETn" I R 6800 10550 50 
F10 "SW" I L 5200 9200 50 
F11 "I2C_FPGA_SDA" B L 5200 10650 50 
F12 "I2C_FPGA_SCL" O L 5200 10550 50 
F13 "I2C_IPMB_SDA" I L 5200 7200 50 
F14 "I2C_IPMB_SCL" I L 5200 7100 50 
F15 "MMC_CONS_PROG_TxD" O L 5200 7800 50 
F16 "MMC_CONS_PROG_RxD" I L 5200 7900 50 
F17 "EN_FMC1_P12V" O L 5200 9650 50 
F18 "EN_PSU_CH" O L 5200 9450 50 
F19 "EN_FMC2_P12V" O L 5200 9550 50 
F20 "ISP_RSTn" I L 5200 8000 50 
F21 "I2C_PM_SDA" B L 5200 10150 50 
F22 "I2C_PM_SCL" O L 5200 10250 50 
F23 "CLK_25MHZ" I R 6800 7450 50 
F24 "FPGA_SCK" I R 6800 10050 50 
F25 "FPGA_SSEL" I R 6800 10150 50 
F26 "FPGA_MISO" I R 6800 10250 50 
F27 "FPGA_MOSI" I R 6800 10350 50 
F28 "OVER_TEMP" I L 5200 9300 50 
F29 "MII_MDIO" I R 6800 6850 50 
F30 "MII_MDC" I R 6800 6950 50 
F31 "AT_DET" I L 5200 9750 50 
F32 "FPGA_INT" I R 6800 9950 50 
F33 "PROG_B" I R 6800 9750 50 
F34 "FPGA_DONE" I R 6800 9850 50 
F35 "LPC_RST" I R 6800 8650 50 
F36 "MMC_TCK" I R 6800 8750 50 
F37 "MMC_TMS" I R 6800 8850 50 
F38 "MMC_TDO" O R 6800 8950 50 
F39 "MMC_TDI" I R 6800 9050 50 
F40 "Pmod3_[0..7]" I R 6800 9450 50 
F41 "FMC1_FUSE" I R 6800 7300 50 
F42 "FMC2_FUSE" I R 6800 9150 50 
F43 "FMC_TCK" O L 5200 8200 50 
F44 "FMC_TDI" O L 5200 8300 50 
F45 "FMC_TDO" I L 5200 8400 50 
F46 "FMC_TMS" O L 5200 8500 50 
F47 "FMC_TRST" O L 5200 8600 50 
F48 "FMC1_PRSNT_Override" O R 6800 7550 50 
F49 "FMC2_PRSNT_Override" O R 6800 7650 50 
$EndSheet
Text Label 6800 7550 0    50   ~ 10
FMC1_PRSNT_Override
Text Label 6800 7650 0    50   ~ 10
FMC2_PRSNT_Override
Wire Wire Line
	7700 8000 7800 8000
Wire Wire Line
	7800 8000 7800 6650
Wire Wire Line
	7700 8000 7700 13100
Wire Wire Line
	7800 6650 8500 6650
Wire Wire Line
	7600 7900 7600 13000
Wire Wire Line
	7600 7550 6800 7550
Wire Wire Line
	7600 7650 6800 7650
Text Label 15800 11600 0    50   ~ 10
FMC_TCK
Text Label 15800 11700 0    50   ~ 10
FMC_TDI
Text Label 15800 11800 0    50   ~ 10
FMC_TDO
Text Label 15800 11900 0    50   ~ 10
FMC_TMS
Text Label 15800 12000 0    50   ~ 10
FMC_TRST
Wire Wire Line
	15650 11600 16200 11600
Wire Wire Line
	15650 11700 16200 11700
Wire Wire Line
	15650 11800 16200 11800
Wire Wire Line
	15650 11900 16200 11900
Wire Wire Line
	15650 12000 16200 12000
$Sheet
S 14150 9850 1500 2200
U 5CA40231
F0 "JTAG" 50
F1 "JTAG.sch" 50
F2 "FPGA_TDI" O L 14150 10600 50 
F3 "FPGA_TDO" I L 14150 10700 50 
F4 "FPGA_TMS" O L 14150 10800 50 
F5 "FPGA_TCK" O L 14150 10900 50 
F6 "FMC2_TCK" O R 15650 11050 50 
F7 "FMC2_TDI" O R 15650 11150 50 
F8 "FMC2_TDO" I R 15650 11250 50 
F9 "FMC2_TMS" O R 15650 11350 50 
F10 "FMC2_TRST" O R 15650 11450 50 
F11 "FMC1_TCK" O R 15650 10500 50 
F12 "FMC1_TDI" O R 15650 10600 50 
F13 "FMC1_TDO" I R 15650 10700 50 
F14 "FMC1_TMS" O R 15650 10800 50 
F15 "FMC1_TRST" O R 15650 10900 50 
F16 "USB_TCK" I L 14150 10000 50 
F17 "USB_TDI_DO" I L 14150 10100 50 
F18 "USB_TMS" I L 14150 10200 50 
F19 "USB_TDO_DI" O L 14150 10300 50 
F20 "EN_USB_JTAG" I L 14150 11050 50 
F21 "Self_FPGA_TMS" I L 14150 11300 50 
F22 "Self_FPGA_TDO" O L 14150 11400 50 
F23 "Self_FPGA_TDI" I L 14150 11500 50 
F24 "Self_FPGA_TCK" I L 14150 11600 50 
F25 "EN_CON_JTAG" O L 14150 11150 50 
F26 "LPC_RST" O R 15650 9950 50 
F27 "MMC_TCK" O R 15650 10050 50 
F28 "MMC_TMS" O R 15650 10150 50 
F29 "MMC_TDO" I R 15650 10250 50 
F30 "MMC_TDI" O R 15650 10350 50 
F31 "FMC1_PRSNT_M2C_L" I L 14150 11700 50 
F32 "FMC2_PRSNT_M2C_L" I L 14150 11800 50 
F33 "FMC1_PRSNT_Override" I L 14150 11900 50 
F34 "FMC2_PRSNT_Override" I L 14150 12000 50 
F35 "FMC_TCK" I R 15650 11600 50 
F36 "FMC_TDI" I R 15650 11700 50 
F37 "FMC_TDO" O R 15650 11800 50 
F38 "FMC_TMS" I R 15650 11900 50 
F39 "FMC_TRST" I R 15650 12000 50 
$EndSheet
$Sheet
S 8400 3900 1650 1000
U 5BCEDA59
F0 "ETH_PHY" 50
F1 "ETH_PHY.sch" 50
F2 "SD_OUT_N" I L 8400 4050 50 
F3 "SD_OUT_P" I L 8400 4150 50 
F4 "SD_IN_N" I L 8400 4300 50 
F5 "SD_IN_P" I L 8400 4400 50 
F6 "MII_MDIO" I L 8400 4650 50 
F7 "MII_MDC" I L 8400 4750 50 
F8 "PHY_RSTn" I R 10050 4200 50 
F9 "RGMII_RXD[0..3]" I R 10050 4300 50 
F10 "RGMII_TXD[0..3]" I R 10050 4400 50 
F11 "RGMII_TX_EN" I R 10050 4500 50 
F12 "RGMII_TX_CLK" I R 10050 4600 50 
F13 "RGMII_RX_DV" I R 10050 4700 50 
F14 "RGMII_RX_CLK" I R 10050 4800 50 
F15 "POE_VC[1..4]" I L 8400 4850 50 
F16 "CLK_25MHZ" I L 8400 4550 50 
$EndSheet
Wire Notes Line
	12050 3950 12050 4950
Wire Notes Line
	11350 4950 12050 4950
Wire Notes Line
	11350 3950 12050 3950
Wire Notes Line
	12350 8550 12350 9550
Wire Notes Line
	12450 8450 12450 9900
Wire Notes Line
	12450 9900 12950 9900
Wire Notes Line
	12450 8450 12950 8450
$Comp
L Pads:PLATED_HOLE2.8_PAD0 B10
U 1 1 5EBE33C9
P 5000 15500
F 0 "B10" H 4990 15605 50  0000 C CNN
F 1 "PLATED_HOLE2.8_PAD0" H 5000 15345 50  0001 L CNN
F 2 "Marble:HOLE2.8_PAD0" H 5000 15270 50  0001 L CNN
F 3 "" H 5000 15195 50  0001 L CNN
F 4 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 5000 12495 50  0001 L CNN "License"
F 5 "dnf" H 5000 15500 50  0001 C CNN "config"
	1    5000 15500
	1    0    0    -1  
$EndComp
$Comp
L Pads:SLOT_2_11 B9
U 1 1 5EBE3B57
P 5000 15250
F 0 "B9" H 5000 15350 50  0000 C CNN
F 1 "SLOT_2_11" H 5000 15095 50  0001 L CNN
F 2 "Marble:HOLE2_SLOT11" H 5000 15020 50  0001 L CNN
F 3 "" H 5000 14945 50  0001 L CNN
F 4 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 5000 12245 50  0001 L CNN "License"
F 5 "dnf" H 5000 15250 50  0001 C CNN "config"
	1    5000 15250
	1    0    0    -1  
$EndComp
Connection ~ 3250 15250
Connection ~ 3250 15500
$Comp
L Pads:PLATED_HOLE2.7_PAD5.0 B11
U 1 1 5ECD5570
P 4000 15250
F 0 "B11" H 3985 15355 50  0000 C CNN
F 1 "PLATED_HOLE2.7_PAD5.0" H 4000 15080 60  0001 L CNN
F 2 "Marble:HOLE2.7_PAD5.0" H 4000 14270 60  0001 L CNN
F 3 "" H 4000 14900 60  0001 L CNN
F 4 "Plated Hole" H 4000 14810 60  0001 L CNN "Pole4"
F 5 "PLATED_HOLE2.7_PAD5.0" H 4000 14810 60  0001 L CNN "Part Number"
F 6 "Single Terminal Socket" H 4000 14720 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 4000 14630 60  0001 L CNN "Library Path"
F 8 " " H 4000 14540 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 4000 14450 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 4000 14360 60  0001 L CNN "Component Type"
F 11 "1" H 4000 14180 60  0001 L CNN "Pin Count"
F 12 " " H 4000 14090 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 4000 14000 60  0001 L CNN "Footprint Path"
F 14 "MTG270_500" H 4000 13910 60  0001 L CNN "Footprint Ref"
F 15 "Plated Hole" H 4000 13820 60  0001 L CNN "Family"
F 16 "No" H 4000 13730 60  0001 L CNN "Mounted"
F 17 "No" H 4000 13640 60  0001 L CNN "Socket"
F 18 "No" H 4000 13550 60  0001 L CNN "SMD"
F 19 "No" H 4000 13460 60  0001 L CNN "Sense"
F 20 " " H 4000 13370 60  0001 L CNN "Sense Comment"
F 21 "None" H 4000 13280 60  0001 L CNN "Status"
F 22 " " H 4000 13190 60  0001 L CNN "Status Comment"
F 23 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 4000 13010 60  0001 L CNN "Part Description"
F 24 " " H 4000 12920 60  0001 L CNN "Manufacturer"
F 25 " " H 4000 12830 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 4000 12740 60  0001 L CNN "ComponentHeight"
F 27 " " H 4000 12650 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 4000 12560 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 4000 12470 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 4000 12200 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 4000 12020 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JMW" H 4000 11930 60  0001 L CNN "Author"
F 33 "09/27/11 00:00:00" H 4000 11840 60  0001 L CNN "CreateDate"
F 34 "09/27/11 00:00:00" H 4000 11750 60  0001 L CNN "LatestRevisionDate"
F 35 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 4000 11660 60  0001 L CNN "PackageDescription"
F 36 "Eletro-mechanical.DbLib" H 4000 11570 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 4000 11480 60  0001 L CNN "License"
F 38 "dnf" H 4000 15250 50  0001 C CNN "config"
	1    4000 15250
	1    0    0    -1  
$EndComp
$Comp
L Pads:PLATED_HOLE2.7_PAD5.0 B12
U 1 1 5ECD6329
P 4150 15250
F 0 "B12" H 4135 15355 50  0000 C CNN
F 1 "PLATED_HOLE2.7_PAD5.0" H 4150 15080 60  0001 L CNN
F 2 "Marble:HOLE2.7_PAD5.0" H 4150 14270 60  0001 L CNN
F 3 "" H 4150 14900 60  0001 L CNN
F 4 "Plated Hole" H 4150 14810 60  0001 L CNN "Pole4"
F 5 "PLATED_HOLE2.7_PAD5.0" H 4150 14810 60  0001 L CNN "Part Number"
F 6 "Single Terminal Socket" H 4150 14720 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 4150 14630 60  0001 L CNN "Library Path"
F 8 " " H 4150 14540 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 4150 14450 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 4150 14360 60  0001 L CNN "Component Type"
F 11 "1" H 4150 14180 60  0001 L CNN "Pin Count"
F 12 " " H 4150 14090 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 4150 14000 60  0001 L CNN "Footprint Path"
F 14 "MTG270_500" H 4150 13910 60  0001 L CNN "Footprint Ref"
F 15 "Plated Hole" H 4150 13820 60  0001 L CNN "Family"
F 16 "No" H 4150 13730 60  0001 L CNN "Mounted"
F 17 "No" H 4150 13640 60  0001 L CNN "Socket"
F 18 "No" H 4150 13550 60  0001 L CNN "SMD"
F 19 "No" H 4150 13460 60  0001 L CNN "Sense"
F 20 " " H 4150 13370 60  0001 L CNN "Sense Comment"
F 21 "None" H 4150 13280 60  0001 L CNN "Status"
F 22 " " H 4150 13190 60  0001 L CNN "Status Comment"
F 23 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 4150 13010 60  0001 L CNN "Part Description"
F 24 " " H 4150 12920 60  0001 L CNN "Manufacturer"
F 25 " " H 4150 12830 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 4150 12740 60  0001 L CNN "ComponentHeight"
F 27 " " H 4150 12650 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 4150 12560 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 4150 12470 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 4150 12200 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 4150 12020 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JMW" H 4150 11930 60  0001 L CNN "Author"
F 33 "09/27/11 00:00:00" H 4150 11840 60  0001 L CNN "CreateDate"
F 34 "09/27/11 00:00:00" H 4150 11750 60  0001 L CNN "LatestRevisionDate"
F 35 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 4150 11660 60  0001 L CNN "PackageDescription"
F 36 "Eletro-mechanical.DbLib" H 4150 11570 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 4150 11480 60  0001 L CNN "License"
F 38 "dnf" H 4150 15250 50  0001 C CNN "config"
	1    4150 15250
	1    0    0    -1  
$EndComp
$Comp
L power:GND #PWR?
U 1 1 5ECDA445
P 4500 15250
AR Path="/5BD32060/5ECDA445" Ref="#PWR?"  Part="1" 
AR Path="/5BABAC65/5ECDA445" Ref="#PWR?"  Part="1" 
AR Path="/5CC24E97/5ECDA445" Ref="#PWR?"  Part="1" 
AR Path="/5CC393D3/5ECDA445" Ref="#PWR?"  Part="1" 
AR Path="/5CC6DBF7/5ECDA445" Ref="#PWR?"  Part="1" 
AR Path="/5CC8AFE1/5ECDA445" Ref="#PWR?"  Part="1" 
AR Path="/5BCEDA3D/5ECDA445" Ref="#PWR?"  Part="1" 
AR Path="/5ECDA445" Ref="#PWR0680"  Part="1" 
F 0 "#PWR0680" H 4500 15000 50  0001 C CNN
F 1 "GND" H 4505 15077 50  0000 C CNN
F 2 "" H 4500 15250 50  0001 C CNN
F 3 "" H 4500 15250 50  0001 C CNN
	1    4500 15250
	1    0    0    -1  
$EndComp
Wire Wire Line
	4000 15250 4150 15250
Wire Wire Line
	4150 15250 4300 15250
Connection ~ 4150 15250
Wire Notes Line
	11350 3500 12150 3500
Wire Notes Line
	12150 1600 12150 3500
Wire Wire Line
	10000 3250 11350 3250
Wire Wire Line
	10000 3350 11350 3350
Wire Wire Line
	8400 2250 7700 2250
Wire Wire Line
	7500 7800 7500 11850
Connection ~ 7500 11850
Wire Wire Line
	7500 11850 5250 11850
Wire Wire Line
	8400 2150 7650 2150
Wire Wire Line
	7450 7750 7450 11750
Connection ~ 7450 11750
Wire Wire Line
	7450 11750 5150 11750
Wire Wire Line
	7750 7900 7750 6550
Wire Wire Line
	7750 6550 8500 6550
Wire Wire Line
	7600 7900 7750 7900
Wire Wire Line
	7700 7800 7700 2250
Wire Wire Line
	7500 7800 7700 7800
Wire Wire Line
	7650 2150 7650 7750
Wire Wire Line
	7450 7750 7650 7750
Text Label 7650 2050 0    50   ~ 10
SI570_OE
Wire Wire Line
	7650 2050 8400 2050
Text Label 13400 9800 2    50   ~ 10
SI570_OE
Wire Wire Line
	12950 9800 13400 9800
Wire Wire Line
	3250 15500 3450 15500
Wire Wire Line
	3250 15250 3450 15250
$Comp
L Pads:PLATED_HOLE2.7_PAD5.0 B13
U 1 1 5F05A5A0
P 4300 15250
F 0 "B13" H 4285 15355 50  0000 C CNN
F 1 "PLATED_HOLE2.7_PAD5.0" H 4300 15080 60  0001 L CNN
F 2 "Marble:HOLE2.7_PAD5.0" H 4300 14270 60  0001 L CNN
F 3 "" H 4300 14900 60  0001 L CNN
F 4 "Plated Hole" H 4300 14810 60  0001 L CNN "Pole4"
F 5 "PLATED_HOLE2.7_PAD5.0" H 4300 14810 60  0001 L CNN "Part Number"
F 6 "Single Terminal Socket" H 4300 14720 60  0001 L CNN "Library Ref"
F 7 "SchLib\\Pads.SchLib" H 4300 14630 60  0001 L CNN "Library Path"
F 8 " " H 4300 14540 60  0001 L CNN "Comment"
F 9 "Standard (No BOM)" H 4300 14450 60  0001 L CNN "Component Kind"
F 10 "Standard (No BOM)" H 4300 14360 60  0001 L CNN "Component Type"
F 11 "1" H 4300 14180 60  0001 L CNN "Pin Count"
F 12 " " H 4300 14090 60  0001 L CNN "Case"
F 13 "PcbLib\\Pads.PcbLib" H 4300 14000 60  0001 L CNN "Footprint Path"
F 14 "MTG270_500" H 4300 13910 60  0001 L CNN "Footprint Ref"
F 15 "Plated Hole" H 4300 13820 60  0001 L CNN "Family"
F 16 "No" H 4300 13730 60  0001 L CNN "Mounted"
F 17 "No" H 4300 13640 60  0001 L CNN "Socket"
F 18 "No" H 4300 13550 60  0001 L CNN "SMD"
F 19 "No" H 4300 13460 60  0001 L CNN "Sense"
F 20 " " H 4300 13370 60  0001 L CNN "Sense Comment"
F 21 "None" H 4300 13280 60  0001 L CNN "Status"
F 22 " " H 4300 13190 60  0001 L CNN "Status Comment"
F 23 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 4300 13010 60  0001 L CNN "Part Description"
F 24 " " H 4300 12920 60  0001 L CNN "Manufacturer"
F 25 " " H 4300 12830 60  0001 L CNN "Manufacturer Part Number"
F 26 "0mm" H 4300 12740 60  0001 L CNN "ComponentHeight"
F 27 " " H 4300 12650 60  0001 L CNN "Manufacturer1 Example"
F 28 " " H 4300 12560 60  0001 L CNN "Manufacturer1 Part Number"
F 29 " " H 4300 12470 60  0001 L CNN "Manufacturer1 ComponentHeight"
F 30 " " H 4300 12200 60  0001 L CNN "ComponentLink1Description"
F 31 " " H 4300 12020 60  0001 L CNN "ComponentLink2Description"
F 32 "CERN DEM JMW" H 4300 11930 60  0001 L CNN "Author"
F 33 "09/27/11 00:00:00" H 4300 11840 60  0001 L CNN "CreateDate"
F 34 "09/27/11 00:00:00" H 4300 11750 60  0001 L CNN "LatestRevisionDate"
F 35 "Plated Through Hole: Hole Dia.=2.7mm Pad Dia.=5.0mm" H 4300 11660 60  0001 L CNN "PackageDescription"
F 36 "Eletro-mechanical.DbLib" H 4300 11570 60  0001 L CNN "Library Name"
F 37 "This work is licensed under the Creative Commons CC-BY-SA 4.0 License. To the extent that circuit schematics that use Licensed Material can be considered to be ‘Adapted Material’, then the copyright holder waives article 3.b of the license with respect to these schematics." H 4300 11480 60  0001 L CNN "License"
F 38 "dnf" H 4300 15250 50  0001 C CNN "config"
	1    4300 15250
	1    0    0    -1  
$EndComp
Connection ~ 4300 15250
Wire Wire Line
	4300 15250 4500 15250
Text Notes 4950 15050 0    50   ~ 0
AMC holes not grounded
Wire Wire Line
	5000 15250 5150 15250
Wire Wire Line
	5000 15500 5150 15500
NoConn ~ 5150 15250
NoConn ~ 5150 15500
Text Notes 2500 2500 0    394  ~ 79
Marble-Mini
$EndSCHEMATC