Which RTL files Generated by CHISEL?

[dalyles]

There are a variety of RTL files that are given to us by ORFS to do example runs,

I was wondering which files were generated by CHISEL?

Thanks!

[vijayank88]

@dalyles
What is OPFS?
Mostly check the file headers. It may contains details related to generated by.

[dalyles]

Corrected to ORFS

[vvbandeira]

@dalyles, I am not 100% sure. But a quick look over points to maybe tinyRocket and mock-array might have some CHISEL dependency. Note that tinyRocket was added long ago and never updated.

May I ask why the question? For ORFS, it should not matter the source of the RTL, as long as it is valid.

[maliberty]

asap7/mock-array is using chisel to generate the .v. Designs in ORFS will be in standard verilog regardless of the source (chisel, system verilog, vhdl, etc). That's because that's what yosys accepts.