Dump waveform of internal signals in cosim

[ninipa]

Hi Folks,
I enabled VERILOG and VERILATOR option in Makefile, and the co-simulation looks fine.
I run a baremetal program which writes data to APB timer at RTL side. From the waveform of apb timer, I can see the expected actions.
However, I have enabled "--trace" during verilator compilation, but I don't know how to enable "--trace" during runtime, this will make waveform only contains info of I/O ports of each module, no internal signal.
This is the runtime command I'm using

./zynqmp_demo unix:/tmp/cosim/qemu-rport-_amba@0_cosim@0 1000000

And this doesn't work

./zynqmp_demo --trace  unix:/tmp/cosim/qemu-rport-_amba@0_cosim@0 1000000

[franciscoIglesias]

Hello ninipa,

With this newly added commit found at master: 46b3c97 you'll obtain the internal signals of the verilated models in a new 'vlt_dump.vcd' file by adding '+trace' at the end of the command line:

# Build with VM_TRACE=1
$ make VM_TRACE=1 zynqmp_demo
# Launch the co-simulation with QEMU with +trace at the end of the command line
$ ./zynqmp_demo unix:/tmp/cosim/qemu-rport-_amba@0_cosim@0 1000000 +trace
...
$ ls trace.vcd vlt_dump.vcd
trace.vcd vlt_dump.vcd
$ gtkwave vlt_dump.vcd  

Best regards,
Francisco Iglesias

[ninipa]

Hi Francisco,

Thanks very much! I just tried and it works well!

[mksaksms]

@ninipa hello ninipa. I was wondering whether you was able to run the zynqmp demo and do cosimulation ? Does your hardware design has some custom apb IPs and you can acess those address while co simulation ?