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EmitALU.cpp
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#include "basetypes.h"
#include "InstructionCache.h"
#include "InstructionDependencies.h"
#include "EmitMisc.h"
#include "nativecodecache.h"
#include "PatchManager.h"
#include "mpe.h"
static const __m128i sub_sv_mask = _mm_set_epi32(0xFFFF0000UL, 0xFFFF0000UL, 0xFFFF0000UL, 0xFFFF0000UL);
void Emit_ABS(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_ALU_SRC1];
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
//eax = src1
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
//ebx = src1
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
//ebp = src1
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_eax);
// ebx = 0 if src1 is positive and -1 if src1 is negative
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_ebx, 31);
// eax = ~src1 if src1 is negative and src1 if src1 is positive
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
// eax = ~src1 + 1 if src1 is negative and src1 if src1 is positive
vars->mpe->nativeCodeCache.X86Emit_SUBRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVCZ)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_NVCZ)), x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_C)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_SHRIR(x86Reg::x86Reg_ebx, 30);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(CC_ALU_CARRY, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
}
if(vars->miscRegOutDep & (DEPENDENCY_FLAG_N | DEPENDENCY_FLAG_V))
{
if((vars->miscRegOutDep & (DEPENDENCY_FLAG_N | DEPENDENCY_FLAG_V)) == DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_NEGATIVE, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(0x80000000, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
}
else if((vars->miscRegOutDep & (DEPENDENCY_FLAG_N | DEPENDENCY_FLAG_V)) == DEPENDENCY_FLAG_V)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_OVERFLOW, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(0x80000000, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
}
else
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_NEGATIVE|CC_ALU_OVERFLOW, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(0x80000000, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
}
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_ZERO, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVCZ)
{
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
}
void Emit_BITSScalar(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1Imm = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegReadBaseReg = GetScalarRegReadBaseReg(vars,destRegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, destRegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(src1Imm, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x1F, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_SHRRR(x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NZ)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_NZ)), x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_SHRIR(x86Reg::x86Reg_ecx, 28);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(CC_ALU_NEGATIVE, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_ZERO, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NZ)
{
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
}
void Emit_BITSImmediate(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1Imm = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2Imm = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg destRegReadBaseReg = GetScalarRegReadBaseReg(vars,destRegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, destRegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
vars->mpe->nativeCodeCache.X86Emit_SHRIR(x86Reg::x86Reg_ebx, src2Imm);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(src1Imm, x86Reg::x86Reg_ebx);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NZ)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_NZ)), x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_SHRIR(x86Reg::x86Reg_ecx, 28);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(CC_ALU_NEGATIVE, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_ZERO, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NZ)
{
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
}
void Emit_BTST(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 mask = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(mask, x86Reg::x86Reg_ebx);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)), x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_ZERO, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
}
void Emit_BUTT(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
if(vars->scalarRegOutDep & (1u << (destRegIndex+1)))
{
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_SUBMR(x86Reg::x86Reg_eax, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+4);
}
vars->mpe->nativeCodeCache.X86Emit_ADDMR(x86Reg::x86Reg_ebx, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
if(vars->scalarRegOutDep & (1u << destRegIndex))
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVCZ)
{
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_SETSR(x86Reg::x86Reg_ch);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_V)
{
vars->mpe->nativeCodeCache.X86Emit_SETOR(x86Reg::x86Reg_cl);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_C)
{
vars->mpe->nativeCodeCache.X86Emit_SETBR(x86Reg::x86Reg_dh);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_SETZR(x86Reg::x86Reg_dl);
}
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_NVCZ)), x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_SHLIR(x86Reg::x86Reg_ch, 3);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_al, x86Reg::x86Reg_ch);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_V)
{
vars->mpe->nativeCodeCache.X86Emit_SHLIR(x86Reg::x86Reg_cl, 2);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_al, x86Reg::x86Reg_cl);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_C)
{
vars->mpe->nativeCodeCache.X86Emit_SHLIR(x86Reg::x86Reg_dh, 1);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_al, x86Reg::x86Reg_dh);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_al, x86Reg::x86Reg_dl);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVCZ)
{
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
}
void Emit_COPY(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)), x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_SHRIR(x86Reg::x86Reg_ecx, 28);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(CC_ALU_NEGATIVE, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_ZERO, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
}
void Emit_MSB(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 src1RegIndex = nuance.fields[FIELD_ALU_SRC1];
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
//n = (n ^ (n >> 31))
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_ebx, 31);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
//fold n into itself to get a new value where all bits below the
//most significant one bit have also been set to one.
//n = n | (n >> 1)
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_ebx, 1);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
//n = n | (n >> 2)
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_ebx, 2);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
//n = n | (n >> 4)
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_ebx, 4);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
//n = n | (n >> 8)
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_ebx, 8);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
//n = n | (n >> 16)
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_ebx, 16);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
//get the ones count
//n = n - ((n >> 1) & 0x55555555)
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_ebx, 1);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x55555555, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_SUBRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
//n = (((n >> 2) & 0x33333333) + (n & 0x33333333))
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_ebx, 2);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x33333333, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x33333333, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
//n = (((n >> 4) + n) & 0x0f0f0f0f)
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_ebx, 4);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x0F0F0F0F, x86Reg::x86Reg_eax);
//n = n + (n >> 8)
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_ebx, 8);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
//n = n + (n >> 16)
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_eax, 16);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
//sigbits = n & 0x1F
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x1F, x86Reg::x86Reg_ebx);
//dest = sigbits
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~CC_ALU_ZERO, x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_ZERO, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
}
void Emit_SAT(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_ALU_SRC1];
const int32 mask = (0x01UL << nuance.fields[FIELD_ALU_SRC2]) - 1;
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
//const x86BaseReg destRegReadBaseReg = GetScalarRegReadBaseReg(vars,destRegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(mask, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMPRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMOVNLERR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_NOTR(x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMPRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMOVLRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_eax);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NZ)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_NZ)), x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_SHRIR(x86Reg::x86Reg_ecx, 28);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(CC_ALU_NEGATIVE, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_ZERO, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NZ)
{
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
}
void Emit_ADD_SV(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg src1RegReadBaseReg_0 = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src1RegReadBaseReg_1 = GetScalarRegReadBaseReg(vars,src1RegIndex+1);
const x86BaseReg src1RegReadBaseReg_2 = GetScalarRegReadBaseReg(vars,src1RegIndex+2);
const x86BaseReg src1RegReadBaseReg_3 = GetScalarRegReadBaseReg(vars,src1RegIndex+3);
const x86BaseReg src2RegReadBaseReg_0 = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg src2RegReadBaseReg_1 = GetScalarRegReadBaseReg(vars,src2RegIndex+1);
const x86BaseReg src2RegReadBaseReg_2 = GetScalarRegReadBaseReg(vars,src2RegIndex+2);
const x86BaseReg src2RegReadBaseReg_3 = GetScalarRegReadBaseReg(vars,src2RegIndex+3);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
if( ((src1RegReadBaseReg_0 == src1RegReadBaseReg_1) && (src1RegReadBaseReg_2 == src1RegReadBaseReg_3)) &&
((src2RegReadBaseReg_0 == src2RegReadBaseReg_1) && (src2RegReadBaseReg_2 == src2RegReadBaseReg_3)) )
{
vars->mpe->nativeCodeCache.X86Emit_MOVDQAMR(x86Reg::x86Reg_xmm2, (uint32)&sub_sv_mask);
vars->mpe->nativeCodeCache.X86Emit_MOVDQUMR(x86Reg::x86Reg_xmm0, src2RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVDQUMR(x86Reg::x86Reg_xmm1, src1RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_PANDRR(x86Reg::x86Reg_xmm0, x86Reg::x86Reg_xmm2);
vars->mpe->nativeCodeCache.X86Emit_PANDRR(x86Reg::x86Reg_xmm1, x86Reg::x86Reg_xmm2);
vars->mpe->nativeCodeCache.X86Emit_PADDRR(x86Reg::x86Reg_xmm0, x86Reg::x86Reg_xmm1);
vars->mpe->nativeCodeCache.X86Emit_MOVDQURM(x86Reg::x86Reg_xmm0, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
else
{
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src2RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src1RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, src2RegReadBaseReg_1, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_edx, src1RegReadBaseReg_1, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(0xFFFF0000, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src2RegReadBaseReg_2, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp+8);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_edx, src1RegReadBaseReg_2, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp+8);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src2RegReadBaseReg_3, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp+12);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ecx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, src1RegReadBaseReg_3, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp+12);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+8);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+12);
}
}
void Emit_ADD_P(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg src1RegReadBaseReg_0 = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src1RegReadBaseReg_1 = GetScalarRegReadBaseReg(vars,src1RegIndex+1);
const x86BaseReg src1RegReadBaseReg_2 = GetScalarRegReadBaseReg(vars,src1RegIndex+2);
const x86BaseReg src2RegReadBaseReg_0 = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg src2RegReadBaseReg_1 = GetScalarRegReadBaseReg(vars,src2RegIndex+1);
const x86BaseReg src2RegReadBaseReg_2 = GetScalarRegReadBaseReg(vars,src2RegIndex+2);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src2RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src1RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, src2RegReadBaseReg_1, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_edx, src1RegReadBaseReg_1, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(0xFFFF0000, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src2RegReadBaseReg_2, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp+8);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_edx, src1RegReadBaseReg_2, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp+8);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ecx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+8);
}
void Emit_SUB_SV(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg src1RegReadBaseReg_0 = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src1RegReadBaseReg_1 = GetScalarRegReadBaseReg(vars,src1RegIndex+1);
const x86BaseReg src1RegReadBaseReg_2 = GetScalarRegReadBaseReg(vars,src1RegIndex+2);
const x86BaseReg src1RegReadBaseReg_3 = GetScalarRegReadBaseReg(vars,src1RegIndex+3);
const x86BaseReg src2RegReadBaseReg_0 = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg src2RegReadBaseReg_1 = GetScalarRegReadBaseReg(vars,src2RegIndex+1);
const x86BaseReg src2RegReadBaseReg_2 = GetScalarRegReadBaseReg(vars,src2RegIndex+2);
const x86BaseReg src2RegReadBaseReg_3 = GetScalarRegReadBaseReg(vars,src2RegIndex+3);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
if(src2RegIndex != src1RegIndex)
{
if( ((src1RegReadBaseReg_0 == src1RegReadBaseReg_1) && (src1RegReadBaseReg_2 == src1RegReadBaseReg_3)) &&
((src2RegReadBaseReg_0 == src2RegReadBaseReg_1) && (src2RegReadBaseReg_2 == src2RegReadBaseReg_3)) )
{
vars->mpe->nativeCodeCache.X86Emit_MOVDQAMR(x86Reg::x86Reg_xmm2, (uint32)&sub_sv_mask);
vars->mpe->nativeCodeCache.X86Emit_MOVDQUMR(x86Reg::x86Reg_xmm0, src2RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVDQUMR(x86Reg::x86Reg_xmm1, src1RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_PANDRR(x86Reg::x86Reg_xmm0, x86Reg::x86Reg_xmm2);
vars->mpe->nativeCodeCache.X86Emit_PANDRR(x86Reg::x86Reg_xmm1, x86Reg::x86Reg_xmm2);
vars->mpe->nativeCodeCache.X86Emit_PSUBDRR(x86Reg::x86Reg_xmm0, x86Reg::x86Reg_xmm1);
vars->mpe->nativeCodeCache.X86Emit_MOVDQURM(x86Reg::x86Reg_xmm0, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
else
{
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src2RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src1RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, src2RegReadBaseReg_1, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_edx, src1RegReadBaseReg_1, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(0xFFFF0000, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_SUBRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_SUBRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src2RegReadBaseReg_2, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp+8);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_edx, src1RegReadBaseReg_2, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp+8);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src2RegReadBaseReg_3, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp+12);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ecx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, src1RegReadBaseReg_3, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp+12);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_SUBRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_SUBRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+8);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+12);
}
}
else
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+8);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+12);
}
}
void Emit_SUB_P(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg src1RegReadBaseReg_0 = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src1RegReadBaseReg_1 = GetScalarRegReadBaseReg(vars,src1RegIndex+1);
const x86BaseReg src1RegReadBaseReg_2 = GetScalarRegReadBaseReg(vars,src1RegIndex+2);
const x86BaseReg src2RegReadBaseReg_0 = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg src2RegReadBaseReg_1 = GetScalarRegReadBaseReg(vars,src2RegIndex+1);
const x86BaseReg src2RegReadBaseReg_2 = GetScalarRegReadBaseReg(vars,src2RegIndex+2);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
if(src2RegIndex != src1RegIndex)
{
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src2RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src1RegReadBaseReg_0, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, src2RegReadBaseReg_1, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_edx, src1RegReadBaseReg_1, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(0xFFFF0000, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_SUBRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_SUBRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src2RegReadBaseReg_2, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp+8);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_edx, src1RegReadBaseReg_2, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp+8);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ecx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ANDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_SUBRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+8);
}
else
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+4);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp+8);
}
}
void Emit_ANDScalar(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_ANDMR(x86Reg::x86Reg_ebx, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)), x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_SHRIR(x86Reg::x86Reg_ecx, 28);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(CC_ALU_NEGATIVE, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_ZERO, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
}
void Emit_ANDImmediate(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1Imm = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(src1Imm, x86Reg::x86Reg_ebx);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)), x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_SHRIR(x86Reg::x86Reg_ecx, 28);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(CC_ALU_NEGATIVE, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_ALU_ZERO, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ecx);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
}
void Emit_ANDImmediateShiftScalar(EmitterVariables * const vars, const Nuance &nuance)
{
constexpr uint32 l_shl = 0;
constexpr uint32 l_calc_flags = 1;
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1Imm = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegReadBaseReg = GetScalarRegReadBaseReg(vars,destRegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
vars->mpe->nativeCodeCache.patchMgr.Reset();
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(src1Imm, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(64,x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x3F, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_SUBRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x20, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_CMOVNZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_JCC_Label(X86_CC_NZ,l_shl);
vars->mpe->nativeCodeCache.X86Emit_SHRRR(x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_calc_flags);
vars->mpe->nativeCodeCache.SetLabelPointer(l_shl);
vars->mpe->nativeCodeCache.X86Emit_SHLRR(x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.SetLabelPointer(l_calc_flags);
vars->mpe->nativeCodeCache.X86Emit_ANDMR(x86Reg::x86Reg_ebx, destRegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_SETSR(x86Reg::x86Reg_dh);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_SETZR(x86Reg::x86Reg_dl);
}
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)), x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_SHLIR(x86Reg::x86Reg_dh, 3);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_al, x86Reg::x86Reg_dh);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_al, x86Reg::x86Reg_dl);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
vars->mpe->nativeCodeCache.patchMgr.ApplyPatches();
}
void Emit_ANDScalarShiftScalar(EmitterVariables * const vars, const Nuance &nuance)
{
constexpr uint32 l_shl = 0;
constexpr uint32 l_calc_flags = 1;
const uint32 destRegIndex = nuance.fields[FIELD_ALU_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_ALU_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_ALU_SRC2];
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegReadBaseReg = GetScalarRegReadBaseReg(vars,destRegIndex);
//const x86BaseReg ccRegReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
const x86BaseReg ccRegWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccRegDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
vars->mpe->nativeCodeCache.patchMgr.Reset();
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(64,x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x3F, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_SUBRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x20, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_CMOVNZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_JCC_Label(X86_CC_NZ,l_shl);
vars->mpe->nativeCodeCache.X86Emit_SHRRR(x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_calc_flags);
vars->mpe->nativeCodeCache.SetLabelPointer(l_shl);
vars->mpe->nativeCodeCache.X86Emit_SHLRR(x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.SetLabelPointer(l_calc_flags);
vars->mpe->nativeCodeCache.X86Emit_ANDMR(x86Reg::x86Reg_ebx, destRegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_ebx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ebx);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_SETSR(x86Reg::x86Reg_dh);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_SETZR(x86Reg::x86Reg_dl);
}
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)), x86MemPtr::x86MemPtr_dword, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_N)
{
vars->mpe->nativeCodeCache.X86Emit_SHLIR(x86Reg::x86Reg_dh, 3);
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_al, x86Reg::x86Reg_dh);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_Z)
{
vars->mpe->nativeCodeCache.X86Emit_ORRR(x86Reg::x86Reg_al, x86Reg::x86Reg_dl);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_NVZ)
{
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_eax, ccRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccRegDisp);