Merge pull request #2 from liuervehc/master

everything changes

Makefile

@@ -47,7 +47,7 @@ INCLUDES := include
 #---------------------------------------------------------------------------------
 ARCH     := -march=armv8-a+crc+crypto -mtune=cortex-a57 -mtp=soft -fPIE
 
-CFLAGS   := -g -Wall -O2 -ffunction-sections $(ARCH) $(DEFINES)
+CFLAGS   := -g -Wall -O0 -ffunction-sections $(ARCH) $(DEFINES)
 CFLAGS   += $(INCLUDE) -D__SWITCH__
 CXXFLAGS := $(CFLAGS) -fno-rtti -fno-exceptions
 

caffeine.json

@@ -4,12 +4,12 @@
     "title_id_range_min": "0x010000000000100D",
     "title_id_range_max": "0x010000000000100D",
     "main_thread_stack_size": "0x100000",
-    "main_thread_priority": 44,
-    "default_cpu_id": 0,
+    "main_thread_priority": 63,
+    "default_cpu_id": 3,
     "process_category": 0,
-    "pool_partition": 0,
+    "pool_partition": 2,
     "is_64_bit": true,
-    "address_space_type": 1,
+    "address_space_type": 3,
     "is_retail": true,
     "filesystem_access": {
         "permissions": "0xFFFFFFFFFFFFFFFF"
@@ -24,10 +24,10 @@
         {
             "type": "kernel_flags",
             "value": {
-                "highest_thread_priority": 59,
-                "lowest_thread_priority": 28,
-                "highest_cpu_id": 2,
-                "lowest_cpu_id": 0
+                "highest_thread_priority": 63,
+                "lowest_thread_priority": 24,
+                "highest_cpu_id": 3,
+                "lowest_cpu_id": 3
             }
         },
         {

rebootstub/linker.ld

@@ -4,7 +4,7 @@ OUTPUT_ARCH(arm)
 ENTRY(_start)
 SECTIONS
 {
-    . = 0x4003F000;
+    . = 0x40038800;
 
     __start__ = ABSOLUTE(.);
 

sc7fw/linker.ld

@@ -4,7 +4,7 @@ OUTPUT_ARCH(arm)
 ENTRY(_start)
 SECTIONS
 {
-    . = 0x4003D000;
+    . = 0x40038000;
 
     __start__ = ABSOLUTE(.);
 

sc7fw/src/sc7.c

@@ -21,40 +21,10 @@
 #include "pmc.h"
 #include "car.h"
 #include "i2c.h"
-#include "smmu.h"
 #include "timer.h"
 #include "utils.h"
 
-#define MAKE_CLK_RST_REG(r)                 (MAKE_REG32(((uintptr_t)0x60006000) + (r)))
-
-#define CLK_RST_CONTROLLER_RST_DEV_H_SET_0  MAKE_CLK_RST_REG(0x308)
-#define CLK_RST_CONTROLLER_CLK_ENB_H_CLR_0  MAKE_CLK_RST_REG(0x32C)
-
-#define MAKE_FLOW_CTLR_REG(r)               (MAKE_REG32(((uintptr_t)0x60007000) + (r)))
-
-#define FLOW_CTLR_HALT_COP_EVENTS_0         MAKE_FLOW_CTLR_REG(0x004)
-
-#define MAKE_AHBDMA_REG(r)                  (MAKE_REG32(((uintptr_t)0x60008000) + (r)))
-
-#define AHBDMA_CMD_0                        MAKE_AHBDMA_REG(0x000)
-
-#define MAKE_MC_REG(r)                      (MAKE_REG32(((uintptr_t)0x70019000) + (r)))
-
-#define MC_SMMU_TLB_CONFIG_0                MAKE_MC_REG(0x014)
-#define MC_SMMU_PTB_ASID_0                  MAKE_MC_REG(0x01C)
-#define MC_SMMU_PTB_DATA_0                  MAKE_MC_REG(0x020)
-#define MC_SMMU_TLB_FLUSH_0                 MAKE_MC_REG(0x030)
-#define MC_SMMU_PTC_FLUSH_0                 MAKE_MC_REG(0x034)
-#define MC_SMMU_AVPC_ASID_0                 MAKE_MC_REG(0x23C)
-
-#define AVP_CACHE_CONFIG_0                  MAKE_REG32((uintptr_t)0x50040000)
-
-#define PGE_DIR                             ((uintptr_t)0x80000000)
-#define PGE_TBL                             ((uintptr_t)0x80001000)
-#define PGE                                 ((uintptr_t)0x80002000)
-
-#define PGE_PDE                             (PGE_DIR + ((PGE >> 20) & 0xFFC))
-#define PGE_PTE                             (PGE_TBL + ((PGE >> 10) & 0xFFC))
+#define AVP_CACHE_CONFIG_0  MAKE_REG32((uintptr_t)0x50040000)
 
 noreturn void reboot(void) {
   APBDEV_PMC_CNTRL_0 = 0x10;
@@ -63,38 +33,6 @@ noreturn void reboot(void) {
   }
 }
 
-noreturn void prepare_for_asid_change(void) {
-  AVP_CACHE_CONFIG_0 = 0xC00;
-
-  MC_SMMU_AVPC_ASID_0 = SMMU_ASID_DISABLE;
-  (void)MC_SMMU_TLB_CONFIG_0;
-
-  memset((void *)PGE_DIR, 0, 0x3000);
-
-  MAKE_REG32(PGE_PDE) = SMMU_MK_PDE(PGE_TBL, _PDE_ATTR_N);
-  MAKE_REG32(PGE_PTE) = SMMU_PFN_TO_PTE(SMMU_ADDR_TO_PFN(PGE), _PTE_ATTR);
-
-  MC_SMMU_PTB_ASID_0 = 0;
-  MC_SMMU_PTB_DATA_0 = SMMU_MK_PDIR(PGE_DIR, _PDIR_ATTR);
-
-  (void)MC_SMMU_TLB_CONFIG_0;
-  MC_SMMU_PTC_FLUSH_0 = 0;
-  (void)MC_SMMU_TLB_CONFIG_0;
-  MC_SMMU_TLB_FLUSH_0 = 0;
-  (void)MC_SMMU_TLB_CONFIG_0;
-
-  for (;;) {
-    FLOW_CTLR_HALT_COP_EVENTS_0 = 0x50000000;
-  }
-}
-
-static inline void ahbdma_deinit_hw(void) {
-  AHBDMA_CMD_0 &= ~BIT(31);
-
-  CLK_RST_CONTROLLER_RST_DEV_H_SET_0 = BIT(1);
-  CLK_RST_CONTROLLER_CLK_ENB_H_CLR_0 = BIT(1);
-}
-
 static inline void configure_hiz_mode(void) {
   clkrst_reboot(CARDEVICE_I2C1);
 
@@ -114,25 +52,19 @@ static inline void configure_pmic_wake_event(void) {
 }
 
 void sc7_entry_main(void) {
-  APBDEV_PMC_DPD_ENABLE_0 = 0;
+  AVP_CACHE_CONFIG_0 |= 0xC00;
 
-  spinlock_wait(0x128);
+  /* FIXME: determine that our payload is in place rather than stupidly waiting */
+  /* if your display remains blank, try adjusting this value */
+  spinlock_wait(0x1000000);
 
   configure_pmic_wake_event();
   configure_hiz_mode();
-  ahbdma_deinit_hw();
-
-  volatile struct _params {
-    uint32_t phys;
-    uint32_t size;
-  } *params = (volatile struct _params *)0x4003DFF8;
-
-  memcpy((void *)0x40010000, (void *)params->phys, params->size);
 
   APBDEV_PMC_SCRATCH45_0 = 0x2E38DFFF;
   APBDEV_PMC_SCRATCH46_0 = 0x6001DC28;
 
-  APBDEV_PMC_SCRATCH33_0 = 0x4003F000;
+  APBDEV_PMC_SCRATCH33_0 = 0x40038800;
   APBDEV_PMC_SCRATCH40_0 = 0x6000F208;
 
   reboot();

sc7fw/src/start.s

@@ -25,9 +25,6 @@ _start:
 .globl _reboot
   b   reboot
 
-.globl _prepare_for_asid_change
-  b   prepare_for_asid_change
-
 .globl _crt0
 .type  _crt0,%function
 

source/defines.h

@@ -87,9 +87,12 @@
 #define MC_SMMU_AVPC_ASID_0                 (MC_BASE + 0x23C)
 #define MC_SMMU_PPCS_ASID_0                 (MC_BASE + 0x270)
 
-#define COPY_TO_IRAM(d,s,n)                           \
-  for (unsigned int i = 0; i < (n); i += 4) {         \
-    uint32_t tmp = *(uint32_t *)((uintptr_t)(s) + i); \
-    IRAM((d) + i) = tmp;                              \
+#define ALIGN_UP(v,a) \
+  (((v) + (a) - 1) & (~((a) - 1)))
+
+#define COPY_TO_IRAM(d,s,n)                                \
+  for (unsigned int i = 0; i < ALIGN_UP((n), 4); i += 4) { \
+    uint32_t tmp = *(uint32_t *)((uintptr_t)(s) + i);      \
+    IRAM((d) + i) = tmp;                                   \
   }