Don't set reserved bits in MSR_FMASK #982
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Setting reserved bits causes loader to triple-fault when setting MSR_FMASK at least on Ryzen 4650 when running nested under QEMU/KVM. With reserved bits cleared (upper half of register) the hypervisor can boot successfully.
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Setting reserved bits causes loader to triple-fault when setting MSR_FMASK at least on Ryzen 4650 when running nested under QEMU/KVM.
With reserved bits cleared (upper half of register) the hypervisor can boot successfully.