See Vivado™ Development Environment on amd.com |
This repository contains tutorials that augment the fundamental tutorials found in the Dynamic Function eXchange Tutorial Guide UG947. These examples show design flow features that are common to all devices that support DFX. Additional DFX tutorials can be found under device-specific categories:
Tutorial | Description |
Parallel Compilation of SLRs using Abstract Shell Technology | This tutorial demonstrates a methodology to hierarchically arrange your design to achieve maximum QoR with minimal compile time for designs targeting multi SLR devices in Ultrascale+. |
Using the DFX Decoupler and DFX AXI Shutdown Manager IP | This tutorial demonstrates the use of the two Xilinx IP -- the DFX Decoupler IP and the DFX AXI Shutdown Manager IP -- that help isolate dynamic regions during reconfiguration. This example shows the IP used in Zynq Ultrascale+ but the concepts apply to all architectures that support DFX. |
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