mac: Allow configuring usage of FullMemoryWE (fixes enjoy-digital#70)

On ecp5 `FullMemoryWE` leads to an increase of DP16KD block mem, while
it works better on Intel/Altera devices according to
6c3af74.

Simple solution: Allow it to be toggled

liteeth/mac/__init__.py

@@ -19,7 +19,8 @@ def __init__(self, phy, dw,
         nrxslots          = 2,
         ntxslots          = 2,
         hw_mac            = None,
-        timestamp         = None):
+        timestamp         = None,
+        full_mem_we       = False):
         assert interface in ["crossbar", "wishbone", "hybrid"]
         self.submodules.core = LiteEthMACCore(phy, dw, endianness, with_preamble_crc)
         self.csrs = []
@@ -38,13 +39,17 @@ def __init__(self, phy, dw,
             self.rx_slots  = CSRConstant(nrxslots)
             self.tx_slots  = CSRConstant(ntxslots)
             self.slot_size = CSRConstant(2**bits_for(eth_mtu))
-            self.submodules.interface = FullMemoryWE()(LiteEthMACWishboneInterface(
+            wishbone_interface = LiteEthMACWishboneInterface(
                 dw         = 32,
                 nrxslots   = nrxslots,
                 ntxslots   = ntxslots,
                 endianness = endianness,
                 timestamp  = timestamp,
-            ))
+            )
+            if full_mem_we:
+                self.submodules.interface = FullMemoryWE()(wishbone_interface)
+            else:
+                self.submodules.interface = wishbone_interface
             self.ev, self.bus = self.interface.sram.ev, self.interface.bus
             self.csrs = self.interface.get_csrs() + self.core.get_csrs()
             if interface == "hybrid":