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Radxa rock pi e #1126

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Radxa rock pi e #1126

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ef50711
platform: add radxa rock pi e
nascs Dec 14, 2023
05c945c
gpio: add pull up/down flags
nascs Jan 2, 2024
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1 change: 1 addition & 0 deletions README.md
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Expand Up @@ -54,6 +54,7 @@ ARM
* [Radxa ROCK 5A](../master/docs/radxa_rock_5a.md)
* [Radxa ROCK 5B](../master/docs/radxa_rock_5b.md)
* [Radxa ZERO3](../master/docs/radxa_zero3.md)
* [Radxa ROCK Pi E](../master/docs/radxa_rock_pi_e.md)
* [Rock Pi 4](../master/docs/rockpi4.md)
* [Orange Pi Prime](../master/docs/orange_pi_prime.md)

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1 change: 1 addition & 0 deletions api/mraa/gpio.h
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Expand Up @@ -67,6 +67,7 @@ typedef enum {
MRAA_GPIOD_ACTIVE_LOW = 4,
MRAA_GPIOD_OPEN_DRAIN = 5,
MRAA_GPIOD_OPEN_SOURCE = 6,
MRAA_GPIOD_BIAS_DISABLE = 7,
} mraa_gpio_mode_t;

/**
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33 changes: 33 additions & 0 deletions api/mraa/types.h
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Expand Up @@ -79,6 +79,7 @@ typedef enum {
MRAA_RADXA_CM5_IO = 34, /**< Radxa CM5 IO */
MRAA_RADXA_ROCK_3A = 35, /**< Radxa ROCK 3 Model A */
MRAA_RADXA_E25 = 36, /**< Radxa E25 */
MRAA_RADXA_ROCK_PI_E = 37, /**< Radxa ROCK PI E */

// USB platform extenders start at 256
MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
Expand Down Expand Up @@ -474,6 +475,38 @@ typedef enum {
MRAA_ROCKPI4_PIN40 = 40
} mraa_rockpi4_wiring_t;

/**
* Radxa ROCK Pi E GPIO number enum
*/
typedef enum {
MRAA_RADXA_ROCK_PI_E_PIN3 = 3,
MRAA_RADXA_ROCK_PI_E_PIN5 = 5,
MRAA_RADXA_ROCK_PI_E_PIN7 = 7,
MRAA_RADXA_ROCK_PI_E_PIN8 = 8,
MRAA_RADXA_ROCK_PI_E_PIN10 = 10,
MRAA_RADXA_ROCK_PI_E_PIN11 = 11,
MRAA_RADXA_ROCK_PI_E_PIN12 = 12,
MRAA_RADXA_ROCK_PI_E_PIN13 = 13,
MRAA_RADXA_ROCK_PI_E_PIN15 = 15,
MRAA_RADXA_ROCK_PI_E_PIN19 = 19,
MRAA_RADXA_ROCK_PI_E_PIN21 = 21,
MRAA_RADXA_ROCK_PI_E_PIN22 = 22,
MRAA_RADXA_ROCK_PI_E_PIN23 = 23,
MRAA_RADXA_ROCK_PI_E_PIN24 = 24,
MRAA_RADXA_ROCK_PI_E_PIN26 = 26,
MRAA_RADXA_ROCK_PI_E_PIN27 = 27,
MRAA_RADXA_ROCK_PI_E_PIN28 = 28,
MRAA_RADXA_ROCK_PI_E_PIN29 = 29,
MRAA_RADXA_ROCK_PI_E_PIN31 = 31,
MRAA_RADXA_ROCK_PI_E_PIN32 = 32,
MRAA_RADXA_ROCK_PI_E_PIN33 = 33,
MRAA_RADXA_ROCK_PI_E_PIN35 = 35,
MRAA_RADXA_ROCK_PI_E_PIN36 = 36,
MRAA_RADXA_ROCK_PI_E_PIN37 = 37,
MRAA_RADXA_ROCK_PI_E_PIN38 = 38,
MRAA_RADXA_ROCK_PI_E_PIN40 = 40
} mraa_radxa_rock_pi_e_wiring_t;

/**
* Raspberry PI Wiring compatible numbering enum
*/
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33 changes: 33 additions & 0 deletions api/mraa/types.hpp
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Expand Up @@ -73,6 +73,7 @@ typedef enum {
RADXA_CM5_IO = 34, /**< Radxa CM5 IO */
RADXA_ROCK_3A = 35, /**< Radxa ROCK 3 Model A */
RADXA_E25 = 36, /**< Radxa E25 */
RADXA_ROCK_PI_E = 37, /**< Radxa ROCK Pi E */

FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */

Expand Down Expand Up @@ -465,6 +466,38 @@ typedef enum {
ROCKPI4_PIN40 = 40
} RockPi4Wiring;

/**
* Radxa ROCK PI E GPIO numbering enum
*/
typedef enum {
RADXA_ROCK_PI_E_PIN3 = 3,
RADXA_ROCK_PI_E_PIN5 = 5,
RADXA_ROCK_PI_E_PIN7 = 7,
RADXA_ROCK_PI_E_PIN8 = 8,
RADXA_ROCK_PI_E_PIN10 = 10,
RADXA_ROCK_PI_E_PIN11 = 11,
RADXA_ROCK_PI_E_PIN12 = 12,
RADXA_ROCK_PI_E_PIN13 = 13,
RADXA_ROCK_PI_E_PIN15 = 15,
RADXA_ROCK_PI_E_PIN19 = 19,
RADXA_ROCK_PI_E_PIN21 = 21,
RADXA_ROCK_PI_E_PIN22 = 22,
RADXA_ROCK_PI_E_PIN23 = 23,
RADXA_ROCK_PI_E_PIN24 = 24,
RADXA_ROCK_PI_E_PIN26 = 26,
RADXA_ROCK_PI_E_PIN27 = 27,
RADXA_ROCK_PI_E_PIN28 = 28,
RADXA_ROCK_PI_E_PIN29 = 29,
RADXA_ROCK_PI_E_PIN31 = 31,
RADXA_ROCK_PI_E_PIN32 = 32,
RADXA_ROCK_PI_E_PIN33 = 33,
RADXA_ROCK_PI_E_PIN35 = 35,
RADXA_ROCK_PI_E_PIN36 = 36,
RADXA_ROCK_PI_E_PIN37 = 37,
RADXA_ROCK_PI_E_PIN38 = 38,
RADXA_ROCK_PI_E_PIN40 = 40
} RadxaRockPiEWiring;

/**
* Raspberry PI Wiring compatible numbering enum
*/
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1 change: 1 addition & 0 deletions docs/index.java.md
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Expand Up @@ -63,6 +63,7 @@ Specific platform information for supported platforms is documented here:
- @ref radxa_rock_5a
- @ref radxa_rock_5b
- @ref radxa_zero3
- @ref radxa_rock_pi_e
- @ref rockpi4

## DEBUGGING
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1 change: 1 addition & 0 deletions docs/index.md
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Expand Up @@ -71,6 +71,7 @@ Specific platform information for supported platforms is documented here:
- @ref radxa_rock_5a
- @ref radxa_rock_5b
- @ref radxa_zero3
- @ref radxa_rock_pi_e
- @ref rockpi4

## DEBUGGING
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47 changes: 47 additions & 0 deletions docs/radxa_rock_pi_e.md
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@@ -0,0 +1,47 @@
Radxa ROCK Pi E {#_Radxa}
====================

Radxa ROCK Pi E is a Rockchip RK3288 based single board computer by Radxa. It can run Android or Linux.

Interface notes
---------------

- UART2 is enabled as the default console.
- All UART ports support baud up to 1500000.

Pin Mapping
-----------

Radxa ROCK Pi E has a 40-pin expansion header. Each pin is distinguished by the color.

| Function5| Function4| Function3| Function2| Function1| PIN | PIN | Function1| Function2| Function3| Function4| Function5|
|----------|----------|-----------|-------------|----------|:------|------:|----------|-------------|-----------|------------|------------|
| | | | | 3V3| 1 | 2 | +5.0V| | | | |
| | | | UART1_TXD| GPIO3_A4| 3 | 4 | +5.0V| | | | |
| | | | UART1_RXD| GPIO3_A6| 5 | 6 | GND| | | | |
| | | | | GPIO1_D4| 7 | 8 | GPIO2_A0| UART2_TX_M1| | | |
| | | | | GND| 9 | 10 | GPIO2_A1| UART2_RX_M1| | | |
| | | | | GPIO2_A2| 11 | 12 | GPIO2_C2| | | | |
| | | | | GPIO2_A3| 13 | 14 | GND| | | | |
| | | | | GPIO0_D3| 15 | 16 | USB20DM| | | | |
| | | | | +3.3V| 17 | 18 | USB20DP| | | | |
| | |SPI_TXD_M2 | | GPIO3_A1| 19 | 20 | GND| | | | |
| | |SPI_RXD_M2 | | GPIO3_A2| 21 | 22 |SARADC_IN1| | | | |
| | |SPI_CLK_M2 | | GPIO3_A0| 23 | 24 | GPIO3_B0| |SPI_CSN0_M2| | |
| | | | | GND| 25 | 26 | GPIO2_B4| | | | |
|PWM0 |I2C1_SDA | | | GPIO2_A4| 27 | 28 | GPIO2_A5| | | I2C1_SCL| PWM1|
| | | | | GPIO2_C4| 29 | 30 | GND| | | | |
| | | | | GPIO2_C5| 31 | 32 | GPIO2_C0| | | | |
|PWM2 | | | | GPIO2_A6| 33 | 34 | GND| | | | |
| | | | | GPIO2_C1| 35 | 36 | GPIO2_B7| | | | |
| | | | | GPIO2_C6| 37 | 38 | GPIO2_C3| | | | |
| | | | | GND| 39 | 40 | GPIO2_C7| | | | |

Supports
--------

You can find additional product support in the following channels:

- [Product Info](https://docs.radxa.com/rockpi/rockpie)
- [Forums](https://forum.radxa.com/c/rockpie)
- [Github](https://github.com/radxa)
30 changes: 30 additions & 0 deletions include/arm/radxa_rock_pi_e.h
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@@ -0,0 +1,30 @@
/*
* Author: Nascs <[email protected]>
* Copyright (c) Radxa Limited.
*
* SPDX-License-Identifier: MIT
*/

#pragma once

#ifdef __cplusplus
extern "C" {
#endif

#include "mraa_internal.h"

#define MRAA_RADXA_ROCK_PI_E_GPIO_COUNT 28
#define MRAA_RADXA_ROCK_PI_E_I2C_COUNT 1
#define MRAA_RADXA_ROCK_PI_E_SPI_COUNT 1
#define MRAA_RADXA_ROCK_PI_E_UART_COUNT 2
#define MRAA_RADXA_ROCK_PI_E_PWM_COUNT 1
#define MRAA_RADXA_ROCK_PI_E_AIO_COUNT 1
#define MRAA_RADXA_ROCK_PI_E_PIN_COUNT 40
#define PLATFORM_NAME_RADXA_ROCK_PI_E "Radxa ROCK Pi E"

mraa_board_t *
mraa_radxa_rock_pi_e();

#ifdef __cplusplus
}
#endif
3 changes: 3 additions & 0 deletions include/gpio/gpio_chardev.h
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Expand Up @@ -46,6 +46,9 @@ mraa_boolean_t mraa_is_gpio_line_dir_out(mraa_gpiod_line_info *linfo);
mraa_boolean_t mraa_is_gpio_line_active_low(mraa_gpiod_line_info *linfo);
mraa_boolean_t mraa_is_gpio_line_open_drain(mraa_gpiod_line_info *linfo);
mraa_boolean_t mraa_is_gpio_line_open_source(mraa_gpiod_line_info *linfo);
mraa_boolean_t mraa_is_gpio_line_bias_pull_up(mraa_gpiod_line_info *linfo);
mraa_boolean_t mraa_is_gpio_line_bias_pull_down(mraa_gpiod_line_info *linfo);
mraa_boolean_t mraa_is_gpio_line_bias_disable(mraa_gpiod_line_info *linfo);

int mraa_get_number_of_gpio_chips();
int mraa_get_chip_infos(mraa_gpiod_chip_info*** cinfos);
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6 changes: 6 additions & 0 deletions include/linux/gpio.h
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Expand Up @@ -21,6 +21,9 @@ struct gpiochip_info {
#define GPIOLINE_FLAG_ACTIVE_LOW (1UL << 2)
#define GPIOLINE_FLAG_OPEN_DRAIN (1UL << 3)
#define GPIOLINE_FLAG_OPEN_SOURCE (1UL << 4)
#define GPIOLINE_FLAG_BIAS_PULL_UP (1UL << 5)
#define GPIOLINE_FLAG_BIAS_PULL_DOWN (1UL << 6)
#define GPIOLINE_FLAG_BIAS_DISABLE (1UL << 7)

struct gpioline_info {
__u32 line_offset;
Expand All @@ -36,6 +39,9 @@ struct gpioline_info {
#define GPIOHANDLE_REQUEST_ACTIVE_LOW (1UL << 2)
#define GPIOHANDLE_REQUEST_OPEN_DRAIN (1UL << 3)
#define GPIOHANDLE_REQUEST_OPEN_SOURCE (1UL << 4)
#define GPIOHANDLE_REQUEST_BIAS_PULL_UP (1UL << 5)
#define GPIOHANDLE_REQUEST_BIAS_PULL_DOWN (1UL << 6)
#define GPIOHANDLE_REQUEST_BIAS_DISABLE (1UL << 7)

struct gpiohandle_request {
__u32 lineoffsets[GPIOHANDLES_MAX];
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1 change: 1 addition & 0 deletions src/CMakeLists.txt
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Expand Up @@ -114,6 +114,7 @@ set (mraa_LIB_ARM_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/arm/radxa_e25.c
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_5a.c
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_5b.c
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_pi_e.c
${PROJECT_SOURCE_DIR}/src/arm/radxa_cm5_io.c
${PROJECT_SOURCE_DIR}/src/arm/rockpi4.c
${PROJECT_SOURCE_DIR}/src/arm/adlink_ipi.c
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6 changes: 6 additions & 0 deletions src/arm/arm.c
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Expand Up @@ -17,6 +17,7 @@
#include "arm/radxa_rock_3c.h"
#include "arm/radxa_rock_5a.h"
#include "arm/radxa_rock_5b.h"
#include "arm/radxa_rock_pi_e.h"
#include "arm/radxa_cm5_io.h"
#include "arm/rockpi4.h"
#include "arm/de_nano_soc.h"
Expand Down Expand Up @@ -119,6 +120,8 @@ mraa_arm_platform()
platform_type = MRAA_RADXA_ROCK_5B;
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_CM5_IO))
platform_type = MRAA_RADXA_CM5_IO;
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_ROCK_PI_E))
platform_type = MRAA_RADXA_ROCK_PI_E;
else if (mraa_file_contains("/proc/device-tree/model", "ROCK Pi 4") ||
mraa_file_contains("/proc/device-tree/model", "ROCK PI 4") ||
mraa_file_contains("/proc/device-tree/model", "ROCK 4")
Expand Down Expand Up @@ -171,6 +174,9 @@ mraa_arm_platform()
case MRAA_RADXA_ROCK_5B:
plat = mraa_radxa_rock_5b();
break;
case MRAA_RADXA_ROCK_PI_E:
plat = mraa_radxa_rock_pi_e();
break;
case MRAA_RADXA_CM5_IO:
plat = mraa_radxa_cm5_io();
break;
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