i2s: fix pin offset for 8bit parallel on i2s1

[liebman]

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Pull Request Details 📖

Description

Fix a bug introduced in this commit, i2s1 needs a pin offset of 8 only for 16bit.

Testing

Logic analyzer and a WIP Hub75 driver for SmartMatrix V0 hardware (uses a latch to use less ram & pins)

[Dominaezzz]

Is the pin offset strictly needed? I suppose a user could use the upper half of the 16 bit value to send the data.

(Was looking at #2436 (comment))

Can you keep the esp-idf link as documentation?

[liebman]

I was mistaken - its I2S0 that does not support true 8bit.

If I follow the logic here and always use 8 then for 8 bit we only get the odd bytes each repeated twice. Maybe they do something different in initialization?

I found this topic and a version here that has fixes for 8bit on I2S1. This is where the +8 only for 16bit is from.

[bjoernQ]

What a weird peripheral