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| Matchbox CoPro | ||
| ============== | ||
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| A family of designs for the Matchbox Co Pro for the BBC Micro. | ||
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| For more details on the designs, see: | ||
| http://stardot.org.uk/forums/viewtopic.php?t=8852&f=44 | ||
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| For Jason's LX9 Hardware, see: | ||
| http://stardot.org.uk/forums/viewtopic.php?t=8932&f=8 | ||
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| DIP Switch Settings: | ||
| 0 0 0 0 - 4MHz 65C102 ( 64KB internal RAM, AlanD core) | ||
| 0 0 0 1 - 8MHz 65C102 ( 64KB internal RAM, AlanD core) | ||
| 0 0 1 0 - 16MHz 65C102 ( 64KB internal RAM, AlanD core) | ||
| 0 0 1 1 - 32MHz 65C102 ( 64KB internal RAM, AlanD core) | ||
| 0 1 0 0 - 8MHz Z80 ( 64KB external RAM, T80 core) | ||
| 0 1 0 1 - 32MHz Z80 ( 64KB internal RAM, NextZ80 core) | ||
| 0 1 1 0 - 56MHz Z80 ( 64KB internal RAM, NextZ80 core) | ||
| 0 1 1 1 - 112MHz Z80 ( 64KB internal RAM, NextZ80 core) | ||
| 1 0 0 0 - 16Mhz 80286 (896KB external RAM, Zet core) | ||
| 1 0 0 1 - 4MHz 6809 ( 64KB external RAM, SYS09 core) | ||
| 1 0 1 0 - 16MHz 68000 ( 1MB external RAM, TG68 core) | ||
| 1 0 1 1 - 32MHz PDP11 ( 64KB internal RAM, PDP2011 core) | ||
| 1 1 0 0 - 32MHz ARM2 ( 2MB external RAM, Amber23 core) | ||
| 1 1 0 1 - 32MHz 32016 ( 2MB external RAM, m32632 core) | ||
| 1 1 1 0 - Null / SPI ( Raspberry Pi soft core) | ||
| 1 1 1 1 - BIST ( for manufacturing test purposes) |
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| Original file line number | Diff line number | Diff line change |
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| NET "fastclk" IOSTANDARD = LVCMOS33 ; | ||
| NET "h_phi2" IOSTANDARD = LVCMOS33 ; | ||
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| NET "fastclk" TNM_NET = fastclk; | ||
| TIMESPEC TS_fastclk = PERIOD "fastclk" 31.25 ns HIGH 50%; | ||
| NET "h_phi2" TNM_NET = h_phi2; | ||
| TIMESPEC TS_h_phi2 = PERIOD "h_phi2" 500 ns HIGH 50%; | ||
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| PIN "inst_dcm/CLKFX_BUFG_INST.O" CLOCK_DEDICATED_ROUTE = FALSE; | ||
| PIN "h_phi2_BUFGP/BUFG.O" CLOCK_DEDICATED_ROUTE = FALSE; | ||
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| NET "h_cs_b" IOSTANDARD = LVCMOS33 ; | ||
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| NET "h_rdnw" IOSTANDARD = LVCMOS33 ; | ||
| NET "h_rst_b" IOSTANDARD = LVCMOS33 ; | ||
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| NET "h_addr<0>" IOSTANDARD = LVCMOS33 ; | ||
| NET "h_addr<1>" IOSTANDARD = LVCMOS33 ; | ||
| NET "h_addr<2>" IOSTANDARD = LVCMOS33 ; | ||
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| NET "h_irq_b" IOSTANDARD = LVCMOS33 ; # Not connected | ||
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| NET "h_data<0>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "h_data<1>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "h_data<2>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "h_data<3>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "h_data<4>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "h_data<5>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "h_data<6>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "h_data<7>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
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| NET "ram_cs" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_lb_b" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_oe" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_ub_b" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_wr" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<0>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<1>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<2>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<3>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<4>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<5>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<6>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<7>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<8>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<9>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<10>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<11>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<12>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<13>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<14>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<15>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<16>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<17>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_addr<18>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<0>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<1>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<2>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<3>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<4>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<5>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<6>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<7>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<8>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<9>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<10>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<11>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<12>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<13>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<14>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<15>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<16>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<17>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<18>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<19>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<20>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<21>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<22>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<23>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<24>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<25>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<26>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<27>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<28>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<29>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<30>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "ram_data<31>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "test<1>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "test<2>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "test<3>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "test<4>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "test<5>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "test<6>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "test<7>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "test<8>" IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 2 ; | ||
| NET "sw<0>" IOSTANDARD = LVCMOS33 ; | ||
| NET "sw<1>" IOSTANDARD = LVCMOS33 ; | ||
| NET "sw<2>" IOSTANDARD = LVCMOS33 ; | ||
| NET "sw<3>" IOSTANDARD = LVCMOS33 ; |
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