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issue #169 Enable new multithreading support in Verilator 4
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jbush001 committed Dec 10, 2018
1 parent 9f70742 commit 8365a01
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Showing 2 changed files with 22 additions and 7 deletions.
23 changes: 16 additions & 7 deletions hardware/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,17 @@
project(hardware)
add_subdirectory(fpga/de2-115)

set(ENABLE_VERILATOR_THREADS 0 CACHE BOOL "Enable multithreaded verilator model (improves performance on multiprocessor host machines)")

if (${ENABLE_VERILATOR_THREADS})
include(ProcessorCount)
ProcessorCount(NUM_THREADS)
message("Configure verilator with ${NUM_THREADS} threads")
else()
set(NUM_THREADS 0)
message("Configure verilator with 1 thread")
endif()

find_program(VERILATOR NAMES verilator)

set(VERILATOR_GEN_DIR "${CMAKE_CURRENT_BINARY_DIR}/generated")
Expand All @@ -29,27 +40,25 @@ set(VERILATOR_OPTIONS --unroll-count 512
-I${CMAKE_CURRENT_SOURCE_DIR}/core
-y ${CMAKE_CURRENT_SOURCE_DIR}/testbench
-y ${CMAKE_CURRENT_SOURCE_DIR}/fpga/common
-Mdir ${VERILATOR_GEN_DIR})
-Mdir ${VERILATOR_GEN_DIR}
--threads ${NUM_THREADS})

set(DUMP_WAVEFORM 0 CACHE BOOL "Enable dumping VCD waveforms from Verilog simulator.")

if (${DUMP_WAVEFORM})
set(VERILATOR_OPTIONS ${VERILATOR_OPTIONS} --trace --trace-structs)
endif()

# This version is required because it has fixes for
# https://www.veripool.org/issues/1246-Verilator-modport-declaration-incorrectly-treats-some-outputs-as-inputs
# and a stack smasher (which doesn't have a bug) fixed in change 00a502942e956ed
set(VERILATOR_MIN_VERSION "918")
set(VERILATOR_MIN_VERSION "6")

# Version string looks like this:
# "Verilator 3.920 2018-02-01 rev verilator_3_920"
execute_process(COMMAND ${VERILATOR} --version OUTPUT_VARIABLE verilator_version_str)
string(REGEX MATCH "Verilator ([0-9])\\.([0-9]+)" verilator_version ${verilator_version_str})
if (NOT CMAKE_MATCH_0)
message("Couldn't get verilator version")
elseif(CMAKE_MATCH_2 LESS ${VERILATOR_MIN_VERSION} AND CMAKE_MATCH_1 LESS 4)
message(FATAL_ERROR "Need at least verilator 3.${VERILATOR_MIN_VERSION}")
elseif(CMAKE_MATCH_2 LESS ${VERILATOR_MIN_VERSION} OR CMAKE_MATCH_1 LESS 4)
message(FATAL_ERROR "Need at least verilator 4.${VERILATOR_MIN_VERSION}")
endif()

add_custom_target(nyuzi_vsim ALL
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6 changes: 6 additions & 0 deletions hardware/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -91,6 +91,12 @@ pragma above the module instantiation:

The timescale is set to 1 ns by default, which simulates a 1 GHz clock speed.

This has support for Verilator's ability to utilize multiple processors, which is
disabled by default. To enable, configure using the following and perform a clean
rebuild.

cmake -DENABLE_VERILATOR_THREADS=1 .

### Support for VCS

Template scripts have been added to support building and running with
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