Add mps2 an521, reset on loading to Ram and soft-bkpt-as-hard (#1638)

* Add support for mps2_an521

* Generate reset when loading to Ram

* Add support for soft-bkpt-as-hard

pyocd/core/options.py

@@ -196,6 +196,8 @@ class OptionInfo(NamedTuple):
     OptionInfo('xpsr_control_fields', bool, False,
         "When set to True, XPSR and CONTROL registers will have their respective bitfields defined "
         "for presentation in gdb."),
+    OptionInfo('soft_bkpt_as_hard', bool, False,
+        "Replace software breakpoints with hardware breakpoints."),
     ]
 
 ## @brief The runtime dictionary of options.

pyocd/flash/loader.py

@@ -94,6 +94,9 @@ def program(self, progress_cb: Optional[ProgressCallback] = None, **kwargs: Any)
         if progress_cb is not None:
             progress_cb(1.0)
 
+        if kwargs.get("no_reset", False) is False:
+            target.reset_and_halt()
+
         # Return some performance numbers.
         return ProgrammingInfo(
             program_time=time() - start_time,

pyocd/gdbserver/gdbserver.py

@@ -136,13 +136,16 @@ def __init__(self, session, core=None):
         self.semihost_use_syscalls = session.options.get('semihost_use_syscalls') # Not subscribed.
         self.serve_local_only = session.options.get('serve_local_only') # Not subscribed.
         self.report_core = session.options.get('report_core_number')
+        self.soft_bkpt_as_hard = session.options.get('soft_bkpt_as_hard')
+
         # Subscribe to changes for those of the above options that make sense to change at runtime.
         self.session.options.subscribe(self._option_did_change, [
                 'vector_catch',
                 'step_into_interrupt',
                 'persist',
                 'enable_semihosting',
                 'report_core_number',
+                'soft_bkpt_as_hard',
                 ])
 
         self.packet_size = 2048
@@ -464,7 +467,8 @@ def breakpoint(self, data):
         # handle software breakpoint Z0/z0
         if data[1:2] == b'0':
             if data[0:1] == b'Z':
-                if not self.target.set_breakpoint(addr, Target.BreakpointType.SW):
+                bkpt_type = Target.BreakpointType.HW if self.soft_bkpt_as_hard else Target.BreakpointType.SW
+                if not self.target.set_breakpoint(addr, bkpt_type):
                     return self.create_rsp_packet(b'E01') #EPERM
             else:
                 self.target.remove_breakpoint(addr)
@@ -1266,4 +1270,5 @@ def _option_did_change(self, notification):
             LOG.info("Semihosting %s", ('enabled' if self.enable_semihosting else 'disabled'))
         elif notification.event == 'report_core_number':
             self.report_core = notification.data.new_value
-
+        elif notification.event == 'soft_bkpt_as_hard':
+            self.soft_bkpt_as_hard = notification.data.new_value

pyocd/subcommands/gdbserver_cmd.py

@@ -89,6 +89,8 @@ def get_args(cls) -> List[argparse.ArgumentParser]:
             help="Allow single stepping to step into interrupts.")
         gdbserver_options.add_argument("-c", "--command", dest="commands", metavar="CMD", action='append', nargs='+',
             help="Run command (OpenOCD compatibility).")
+        gdbserver_options.add_argument("-bh", "--soft-bkpt-as-hard", dest="soft_bkpt_as_hard", default=False, action="store_true",
+            help="Replace software breakpoints with hardware breakpoints.")
 
         return [cls.CommonOptions.COMMON, cls.CommonOptions.CONNECT, gdbserver_parser]
 
@@ -147,6 +149,7 @@ def invoke(self) -> int:
                 'enable_semihosting' : self._args.enable_semihosting,
                 'serve_local_only' : self._args.serve_local_only,
                 'vector_catch' : self._args.vector_catch,
+                'soft_bkpt_as_hard' : self._args.soft_bkpt_as_hard,
                 })
 
             # Split list of cores to serve.

pyocd/target/builtin/__init__.py

@@ -124,6 +124,7 @@
 from . import target_HC32L13x
 from . import target_HC32L19x
 from . import target_HC32L07x
+from . import target_MPS2_AN521
 from . import target_MPS3_AN522
 from . import target_MPS3_AN540
 from . import target_RP2040
@@ -143,6 +144,7 @@
 #   instead of dashes punctuation. See pyocd.target.normalise_target_type_name() for the code that
 #   normalises user-provided target type names for comparison with these.
 BUILTIN_TARGETS = {
+          'mps2_an521': target_MPS2_AN521.AN521,
           'mps3_an522': target_MPS3_AN522.AN522,
           'mps3_an540': target_MPS3_AN540.AN540,
           'cortex_m': CoreSightTarget,

pyocd/target/builtin/target_MPS2_AN521.py

@@ -0,0 +1,73 @@
+# pyOCD debugger
+# Copyright (c) 2023 Arm Limited
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+from typing import Optional
+from ...coresight.coresight_target import CoreSightTarget
+from ...core.memory_map import (RamRegion, MemoryMap)
+
+from ...core.target import Target
+
+# see https://developer.arm.com/documentation/101104/0200/programmers-model/system-control-element/system-control-register-block
+SYSTEM_CONTROL = 0x50021000
+RESET_MASK = SYSTEM_CONTROL + 0x104
+RESET_MASK_SYSRSTREQ0_EN = 1 << 4
+RESET_MASK_SYSRSTREQ1_EN = 1 << 5
+CPU_WAIT = SYSTEM_CONTROL + 0x118
+CPU_WAIT_CPU0 = 1
+CPU_WAIT_CPU1 = 2
+
+class AN521(CoreSightTarget):
+
+    VENDOR = "Arm"
+
+    MEMORY_MAP = MemoryMap(
+        RamRegion(  name='code_ns',     start=0x00000000, length=0x08000000, access='rwx'),
+        RamRegion(  name='code_s',      start=0x10000000, length=0x08000000, access='rwxs'),
+
+        RamRegion(  name='sram_ns',     start=0x20000000, length=0x02000000, access='rwx'),
+        RamRegion(  name='mtb_ns',      start=0x24000000, length=0x00004000, access='rwx'),
+        RamRegion(  name='sram2_ns',    start=0x28000000, length=0x00200000, access='rwx'),
+        RamRegion(  name='sram3_ns',    start=0x28200000, length=0x00200000, access='rwx'),
+
+        RamRegion(  name='sram_s',      start=0x30000000, length=0x02000000, access='rwxs'),
+        RamRegion(  name='mtb_s',       start=0x34000000, length=0x00004000, access='rwxs'),
+        RamRegion(  name='sram2_s',     start=0x38000000, length=0x00200000, access='rwxs'),
+        RamRegion(  name='sram3_s',     start=0x38200000, length=0x00200000, access='rwxs'),
+        # External Parallel SRAM only mapped to non-secure
+        RamRegion(  name='psram_ns',    start=0x80000000, length=0x01000000, access='rwx'),
+    )
+
+    def __init__(self, session):
+        super().__init__(session, self.MEMORY_MAP)
+
+    def create_init_sequence(self):
+        seq = super().create_init_sequence()
+
+        seq.insert_before('halt_on_connect',
+            ('enable_sysresetreq',        self._enable_sysresetreq),
+        )
+
+        return seq
+
+    def _enable_sysresetreq(self):
+        reset_mask = self.read32(RESET_MASK)
+        reset_mask |= RESET_MASK_SYSRSTREQ0_EN
+        self.write32(RESET_MASK, reset_mask)
+
+
+    def reset_and_halt(self, reset_type: Optional[Target.ResetType] = None):
+        self.write32(CPU_WAIT, CPU_WAIT_CPU1)
+        super().reset_and_halt(reset_type)

pyocd/tools/gdb_server.py

@@ -78,7 +78,7 @@ def build_parser(self):
         parser.add_argument("-s", "--step-int", dest="step_into_interrupt", default=None, action="store_true", help="Allow single stepping to step into interrupts.")
         parser.add_argument("-f", "--frequency", dest="frequency", default=None, type=int, help="Set the SWD clock frequency in Hz.")
         parser.add_argument("-o", "--persist", dest="persist", default=None, action="store_true", help="Keep GDB server running even after remote has detached.")
-        parser.add_argument("-bh", "--soft-bkpt-as-hard", dest="soft_bkpt_as_hard", default=False, action="store_true", help="Replace software breakpoints with hardware breakpoints (ignored).")
+        parser.add_argument("-bh", "--soft-bkpt-as-hard", dest="soft_bkpt_as_hard", default=False, action="store_true", help="Replace software breakpoints with hardware breakpoints.")
         group = parser.add_mutually_exclusive_group()
         group.add_argument("-ce", "--chip_erase", action="store_true", help="Use chip erase when programming.")
         group.add_argument("-se", "--sector_erase", action="store_true", help="Use sector erase when programming.")
@@ -133,6 +133,7 @@ def get_gdb_server_settings(self, args):
             'fast_program' : args.fast_program,
             'enable_semihosting' : args.enable_semihosting,
             'semihost_console_type' : args.semihost_console_type,
+            'soft_bkpt_as_hard' : args.soft_bkpt_as_hard,
             'telnet_port' : args.telnet_port,
             'semihost_use_syscalls' : args.semihost_use_syscalls,
             'serve_local_only' : args.serve_local_only,