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draft: hexagon system emulation initial #99

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4bce752
tcg/i386: Fold the ext{8,16,32}[us] cases into {s}extract
rth7680 Dec 26, 2024
42ace08
tcg/aarch64: Provide TCG_TARGET_{s}extract_valid
rth7680 Dec 26, 2024
936fc0a
tcg/aarch64: Expand extract with offset 0 with andi
rth7680 Dec 30, 2024
802ef65
tcg/arm: Add full [US]XT[BH] into {s}extract
rth7680 Dec 26, 2024
0c44a4d
tcg/loongarch64: Fold the ext{8,16,32}[us] cases into {s}extract
rth7680 Dec 26, 2024
791d030
tcg/mips: Fold the ext{8,16,32}[us] cases into {s}extract
rth7680 Dec 26, 2024
94d5939
tcg/ppc: Fold the ext{8,16,32}[us] cases into {s}extract
rth7680 Dec 26, 2024
841e2c5
tcg/riscv64: Fold the ext{8,16,32}[us] cases into {s}extract
rth7680 Dec 26, 2024
fa65f13
tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64
rth7680 Dec 30, 2024
42103c4
tcg/s390x: Fold the ext{8,16,32}[us] cases into {s}extract
rth7680 Dec 26, 2024
3dc7e1d
tcg/sparc64: Use SRA, SRL for {s}extract_i64
rth7680 Dec 26, 2024
d9336b7
tcg/tci: Provide TCG_TARGET_{s}extract_valid
rth7680 Dec 26, 2024
41736e7
tcg/tci: Remove assertions for deposit and extract
rth7680 Dec 28, 2024
c334de1
tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64}
rth7680 Dec 26, 2024
6482e9d
tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64}
rth7680 Dec 28, 2024
2c48155
util/cpuinfo-riscv: Detect Zbs
rth7680 Jan 2, 2025
ee97eef
tcg/riscv: Use BEXTI for single-bit extractions
rth7680 Jan 2, 2025
8095f65
linux-user: Add missing /proc/cpuinfo fields for sparc
hdeller Jan 9, 2025
552260a
semihosting: add guest_error logging for failed opens
stsquad Jan 16, 2025
23482cc
semihosting/uaccess: Briefly document returned values
philmd Jan 16, 2025
056c405
semihosting/syscalls: Include missing 'exec/cpu-defs.h' header
philmd Jan 16, 2025
d2f28a0
semihosting/uaccess: Include missing 'exec/cpu-all.h' header
philmd Jan 16, 2025
847343c
semihosting/arm-compat: Include missing 'cpu.h' header
philmd Jan 16, 2025
5779210
semihosting/console: Avoid including 'cpu.h'
philmd Jan 16, 2025
bb0c5be
semihosting/meson: Build config.o and console.o once
philmd Jan 16, 2025
77e911d
system/vl: more error exit into config enumeration code
stsquad Jan 16, 2025
05cdd64
system: squash usb_parse into a single function
stsquad Jan 16, 2025
c0e6b8b
system: propagate Error to gdbserver_start (and other device setups)
stsquad Jan 16, 2025
c7c4300
tests/tcg/plugins/insn: remove unused callback parameter
pbo-linaro Jan 16, 2025
d073706
contrib/plugins/howvec: ensure we don't regress if this plugin is ext…
pbo-linaro Jan 16, 2025
b2a3ebb
tests/tcg/plugins/syscall: fix 32-bit build
pbo-linaro Jan 16, 2025
376bc15
tests/tcg/plugins/mem: fix 32-bit build
pbo-linaro Jan 16, 2025
03be743
contrib/plugins/stoptrigger: fix 32-bit build
pbo-linaro Jan 16, 2025
aa47f44
contrib/plugins/cache: fix 32-bit build
pbo-linaro Jan 16, 2025
2fb2aa0
contrib/plugins/hotblocks: fix 32-bit build
pbo-linaro Jan 16, 2025
a5555b2
contrib/plugins/cflow: fix 32-bit build
pbo-linaro Jan 16, 2025
cab85a6
contrib/plugins/hwprofile: fix 32-bit build
pbo-linaro Jan 16, 2025
645bf06
contrib/plugins/hotpages: fix 32-bit build
pbo-linaro Jan 16, 2025
db7a06a
configure: reenable plugins by default for 32-bit hosts
pbo-linaro Jan 16, 2025
27f347e
accel/tcg: also suppress asynchronous IRQs for cpu_io_recompile
stsquad Jan 16, 2025
8f5a4cf
win32: remove usage of attribute gcc_struct
pbo-linaro Jan 16, 2025
ecbf356
docs/devel/style: add a section about bitfield, and disallow them for…
pbo-linaro Jan 16, 2025
923710b
plugins: enable linking with clang/lld
pbo-linaro Jan 16, 2025
b165ee1
plugins: fix kdoc annotation
stsquad Jan 16, 2025
c08f9d8
editorconfig: update for perl scripts
stsquad Jan 16, 2025
64965b4
tests/qtest: fix some copy and paste errors in kdoc
stsquad Jan 16, 2025
69f11e4
include/exec: fix some copy and paste errors in kdoc
stsquad Jan 16, 2025
2012375
include/exec: remove warning_printed from MemoryRegion
stsquad Jan 16, 2025
7b2c988
docs/sphinx: include kernel-doc script as a dependency
stsquad Jan 16, 2025
f4ac443
docs/devel: add git-publish for patch submitting
pbo-linaro Jan 16, 2025
ca494c9
docs/devel: add b4 for patch retrieval
pbo-linaro Jan 16, 2025
75dbfba
docs/devel: add information on how to setup build environments
pbo-linaro Jan 16, 2025
7f63144
docs/devel: add a codebase section
pbo-linaro Jan 16, 2025
a4340e7
docs: add a glossary
pbo-linaro Jan 16, 2025
b9eab5e
scripts/nsis.py: Run dependency check for each DLL file only once
stweil Jan 16, 2025
1addf57
target/riscv: Add RISC-V CSR qtest support
Jan 9, 2025
b4a91c5
tests/qtest: QTest example for RISC-V CSR register
Jan 9, 2025
99baa5d
tests/qtest: Introduce qtest_init_with_env_and_capabilities()
JurajMarcin Jan 7, 2025
3dec966
tests/qtest/migration: Use out-of-band execution for migrate-recover
JurajMarcin Jan 7, 2025
aa601bd
tests/qtest/test-x86-cpuid-compat: Remove tests related to pc-i440fx-2.3
huth Jan 17, 2025
09360a0
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
stefanhaRH Jan 17, 2025
0e3aff9
Merge tag 'pull-10.0-gdb-plugins-doc-updates-170125-1' of https://git…
stefanhaRH Jan 17, 2025
d3203d5
tcg: Document tb_lookup() and tcg_tb_lookup()
iii-i Jan 16, 2025
5313b1a
accel/tcg: Call tcg_tb_insert() for one-insn TBs
iii-i Jan 16, 2025
db16498
softfloat: Constify helpers returning float_status field
philmd Jan 16, 2025
20fac49
Merge tag 'qtest-20250117-pull-request' of https://gitlab.com/farosas…
stefanhaRH Jan 18, 2025
ffd23ae
target/riscv: rvv: fix typo in vext continuous ldst function names
craigblackmore Dec 18, 2024
d4ce7ef
target/riscv: rvv: speed up small unit-stride loads and stores
craigblackmore Dec 18, 2024
e9952b3
riscv/gdbstub: add V bit to priv reg
yf13 Dec 15, 2024
3739732
target/riscv: add shcounterenw
danielhb Dec 18, 2024
8d6855a
target/riscv: add shvstvala
danielhb Dec 18, 2024
e306fff
target/riscv: add shtvala
danielhb Dec 18, 2024
73afe5c
target/riscv: add shvstvecd
danielhb Dec 18, 2024
c379e6f
target/riscv: add shvsatpa
danielhb Dec 18, 2024
2fedb6b
target/riscv: add shgatpa
danielhb Dec 18, 2024
f4df21e
target/riscv/tcg: add sha
danielhb Dec 18, 2024
e2dca2d
target/riscv: use RISCVException enum in exception helpers
danielhb Jan 6, 2025
8f1a128
target/riscv: add trace in riscv_raise_exception()
danielhb Jan 6, 2025
37089cb
target/riscv: Remove obsolete pointer masking extension code.
spacemonkeydelivers Jan 6, 2025
33ca99a
target/riscv: Add new CSR fields for S{sn, mn, m}pm extensions as par…
spacemonkeydelivers Jan 6, 2025
3d1c5c0
target/riscv: Add helper functions to calculate current number of mas…
spacemonkeydelivers Jan 6, 2025
6ec718e
target/riscv: Add pointer masking tb flags
spacemonkeydelivers Jan 6, 2025
4d501a7
target/riscv: Update address modify functions to take into account po…
spacemonkeydelivers Jan 6, 2025
4d16009
target/riscv: Apply pointer masking for virtualized memory accesses
spacemonkeydelivers Jan 6, 2025
e00e274
target/riscv: Enable updates for pointer masking variables and thus e…
spacemonkeydelivers Jan 6, 2025
36de64b
target/riscv: Add 'ext_smrnmi' in the RISCVCPUConfig
Jan 6, 2025
5db557f
target/riscv: Add Smrnmi CSRs
Jan 6, 2025
c1149f6
target/riscv: Handle Smrnmi interrupt and exception
Jan 6, 2025
3157a55
target/riscv: Add Smrnmi mnret instruction
Jan 6, 2025
f9653d4
target/riscv: Add Smrnmi cpu extension
Jan 6, 2025
0266fd8
target/riscv: Add Zicfilp support for Smrnmi
Jan 6, 2025
7703a1d
target/riscv: Have kvm_riscv_get_timebase_frequency() take RISCVCPU cpu
philmd Jan 12, 2025
cb938a0
hw/riscv/virt: Remove unnecessary use of &first_cpu
philmd Jan 12, 2025
51c4f3e
target/riscv: Add properties for Indirect CSR Access extension
KevinRSX Jan 10, 2025
dc02807
target/riscv: Decouple AIA processing from xiselect and xireg
KevinRSX Jan 10, 2025
dbcb6e1
target/riscv: Enable S*stateen bits for AIA
atishp04 Jan 10, 2025
5e33a20
target/riscv: Support generic CSR indirect access
KevinRSX Jan 10, 2025
f254888
target/riscv: Add properties for counter delegation ISA extensions
atishp04 Jan 10, 2025
e84af93
target/riscv: Add counter delegation definitions
KevinRSX Jan 10, 2025
b6504cd
target/riscv: Add select value range check for counter delegation
KevinRSX Jan 10, 2025
6247dc2
target/riscv: Add counter delegation/configuration support
KevinRSX Jan 10, 2025
04ff272
target/riscv: Invoke pmu init after feature enable
atishp04 Jan 10, 2025
2a754d6
target/riscv: Add implied rule for counter delegation extensions
atishp04 Jan 10, 2025
fdb7bce
target/riscv: Add configuration for S[m|s]csrind, Smcdeleg/Ssccfg
atishp04 Jan 10, 2025
507957e
target/riscv: Fix henvcfg potentially containing stale bits
clementleger Jan 10, 2025
0aadf81
target/riscv: Add Ssdbltrp CSRs handling
clementleger Jan 10, 2025
72d71d8
target/riscv: Implement Ssdbltrp sret, mret and mnret behavior
clementleger Jan 10, 2025
967760f
target/riscv: Implement Ssdbltrp exception handling
clementleger Jan 10, 2025
b0edcbe
target/riscv: Add Ssdbltrp ISA extension enable switch
clementleger Jan 10, 2025
d2e92f1
target/riscv: Add Smdbltrp CSRs handling
clementleger Jan 10, 2025
f2efb6e
target/riscv: Implement Smdbltrp sret, mret and mnret behavior
clementleger Jan 10, 2025
00af7d5
target/riscv: Implement Smdbltrp behavior
clementleger Jan 10, 2025
2d8e825
target/riscv: Add Smdbltrp ISA extension enable switch
clementleger Jan 16, 2025
fa62285
hw/riscv/riscv-iommu.c: Introduce a translation tag for the page tabl…
Nov 8, 2024
941f76e
target/riscv: Support Supm and Sspm as part of Zjpm v1.0
spacemonkeydelivers Jan 13, 2025
f04cac4
hw/char/riscv_htif: Convert HTIF_DEBUG() to trace events
philmd Jan 16, 2025
d6430c1
Merge tag 'pull-riscv-to-apply-20250119-1' of https://github.com/alis…
stefanhaRH Jan 19, 2025
32a97c5
Merge tag 'pull-tcg-20250117' of https://gitlab.com/rth7680/qemu into…
stefanhaRH Jan 21, 2025
0a8b4fd
tests/functional: Convert the kvm_xen_guest avocado test
huth Jan 13, 2025
b94893a
MAINTAINERS: Remove myself as Avocado Framework reviewer
philmd Jan 6, 2025
145f12e
crypto: fix bogus error benchmarking pbkdf on fast machines
berrange Jan 9, 2025
807830e
hw/s390x: Fix crash that occurs when inspecting older versioned machi…
huth Jan 20, 2025
3936d05
pc-bios/s390-ccw/virtio: Add a function to reset a virtio device
huth Jan 16, 2025
68c95ed
pc-bios/s390-ccw: Fix boot problem with virtio-net devices
huth Jan 16, 2025
bbfa7f8
pc-bios/s390-ccw/netmain: Fix error messages with regards to the TFTP…
huth Jan 16, 2025
64fa0de
pc-bios/s390-ccw: Abort IPL on invalid loadparm
JaredRossi Jan 17, 2025
9744ceb
pc-bios: Update the s390 bios images with the recent changes
huth Jan 20, 2025
cf86770
Merge tag 'pull-request-2025-01-21v2' of https://gitlab.com/thuth/qem…
stefanhaRH Jan 22, 2025
0d6a00d
target/hexagon: Fix badva reference, delete CAUSE
androm3da Aug 8, 2024
320dd3c
target/hexagon: Add missing A_CALL attr, hintjumpr to multi_cof
androm3da May 18, 2024
6445056
target/hexagon: Add System/Guest register definitions
androm3da May 18, 2024
cd98585
target/hexagon: Add some utility functions for sysemu
androm3da May 18, 2024
8792c93
target/hexagon: Make gen_exception_end_tb non-static
androm3da May 20, 2024
b527186
target/hexagon: Guard system insts
androm3da May 18, 2024
aefe237
target/hexagon: Switch to tag_ignore(), generate via get_{user,sys}_t…
androm3da May 18, 2024
834aae1
target/hexagon: Guard system insts, switch to tag_ignore()
androm3da May 18, 2024
5c7beff
target/hexagon: Add sysemu instructions triggering need_next_PC, mult…
androm3da May 18, 2024
35d6e83
target/hexagon: Add is_pair() method to scalars
androm3da May 18, 2024
cbd12b9
gdb-xml: Add gdb-xml for hexagon sysemu
quic-mathbern Nov 8, 2023
5a1ac55
target/hexagon: Add memory order definition
androm3da May 20, 2024
f5f02b7
target/hexagon: Add a placeholder fp exception
androm3da May 20, 2024
2cad2d0
target/hexagon: Define page size for sysemu
androm3da May 20, 2024
b80b489
target/hexagon: Add guest, system reg number defs
androm3da May 20, 2024
b407940
target/hexagon: Add guest, system reg number state
androm3da May 29, 2024
9454391
target/hexagon: Add TCG values for sreg, greg
androm3da May 20, 2024
0355ac1
target/hexagon: Add guest/sys reg writes to DC
androm3da May 20, 2024
3da8000
target/hexagon: Add imported macro, attr defs for sysemu
androm3da May 20, 2024
7a3a711
target/hexagon: Define DC states
androm3da Sep 9, 2024
620eec6
FIXME: target/hexagon: Add new macro definitions for sysemu
androm3da May 20, 2024
f27cc68
target/hexagon: Add handlers for guest/sysreg r/w
androm3da May 20, 2024
df0fefd
target/hexagon: Add placeholder greg/sreg r/w helpers
androm3da May 20, 2024
15ae5cb
target/hexagon: Add vmstate representation
androm3da Sep 8, 2024
7c9a86d
docs: Add hexagon sysemu docs
androm3da Apr 30, 2024
c27acd3
FIXME: docs: Add hexagon VM info
androm3da Jul 9, 2024
685f9da
docs/system: Add hexagon CPU emulation
androm3da Oct 26, 2024
a76bbed
target/hexagon: Make A_PRIV, "J2_trap*" insts need_env()
androm3da May 27, 2024
4ced871
target/hexagon: Define register fields for system regs
androm3da May 24, 2024
4d1c856
FIXME this unused fixes some errs
androm3da May 24, 2024
5ff437c
target/hexagon: Add TCG overrides for break,unpause,fetchbo,dczeroa
androm3da May 27, 2024
8216acc
target/hexagon: Implement do_raise_exception()
androm3da Sep 5, 2024
d68964e
target/hexagon: Add system reg insns
androm3da May 29, 2024
2684dd1
target/hexagon: Add sysemu TCG overrides
androm3da Jul 8, 2024
0ab2e5d
target/hexagon: Add implicit attributes to sysemu macros
androm3da Sep 12, 2024
6043c4f
target/hexagon: Add TCG overrides for int handler insts
androm3da Jul 25, 2024
257dbb7
target/hexagon: Add TCG overrides for thread ctl
androm3da Jul 25, 2024
71e4d0c
target/hexagon: Add TCG overrides for rte, nmi
androm3da Jul 25, 2024
27313cc
target/hexagon: Add sreg_{read,write} helpers
androm3da Jul 26, 2024
7abb9c5
target/hexagon: Initialize htid, modectl regs
androm3da Aug 9, 2024
ed95aa6
target/hexagon: Add locks, id, next_PC to state
androm3da Aug 10, 2024
3834b5c
target/hexagon: Add a TLB count property
androm3da Aug 10, 2024
1c4e2d1
target/hexagon: Add {TLB,k0}lock, cause code, wait_next_pc
androm3da Aug 16, 2024
e6752a2
target/hexagon: Add stubs for modify_ssr/get_exe_mode
androm3da Aug 16, 2024
ef176fa
target/hexagon: Add gdb support for sys regs
androm3da Aug 27, 2024
a8c5733
FIXME: target/hexagon: Add initial MMU model
androm3da Aug 26, 2024
325a784
target/hexagon: Add IRQ events
androm3da Aug 27, 2024
476ebd3
target/hexagon: Add clear_wait_mode() definition
androm3da Aug 27, 2024
bf819ed
target/hexagon: Define f{S,G}ET_FIELD macros
androm3da Aug 27, 2024
a7bcc9b
target/hexagon: Add hex_interrupts support
androm3da Aug 27, 2024
e6d18f5
hw/intc: Add l2vic interrupt controller
SidManning Nov 8, 2023
01a8812
target/hexagon: Implement ciad helper
androm3da Aug 28, 2024
e8b9bd0
target/hexagon: Implement {c,}swi helpers
androm3da Aug 28, 2024
df68848
target/hexagon: Implement iassign{r,w} helpers
androm3da Aug 28, 2024
d8c051e
target/hexagon: Implement start/stop helpers
androm3da Aug 28, 2024
eb3ad57
target/hexagon: Implement modify SSR
androm3da Aug 28, 2024
b109f38
target/hexagon: Implement {g,s}etimask helpers
androm3da Aug 28, 2024
b743b46
target/hexagon: Implement wait helper
androm3da Aug 28, 2024
76185db
target/hexagon: Implement get_exe_mode()
androm3da Aug 28, 2024
763e5dc
target/hexagon: Implement arch_get_system_reg()
androm3da Aug 28, 2024
8ff5ca4
target/hexagon: Implement arch_{s,g}et_{thread,system}_reg()
androm3da Aug 28, 2024
4767ad5
target/hexagon: Add representation to count cycles
androm3da Aug 29, 2024
00f175d
target/hexagon: Add implementation of cycle counters
androm3da Aug 29, 2024
df9ece8
target/hexagon: Implement modify_syscfg()
androm3da Aug 29, 2024
2750f61
target/hexagon: Add system event, cause codes
androm3da Sep 4, 2024
69a94c4
target/hexagon: Implement hex_tlb_entry_get_perm()
androm3da Sep 4, 2024
38938d2
target/hexagon: Implement hex_tlb_lookup_by_asid()
androm3da Sep 4, 2024
ae4a9e7
target/hexagon: Implement software interrupt
androm3da Sep 4, 2024
7227d11
target/hexagon: Implement exec_interrupt, set_irq
androm3da Sep 5, 2024
309fc83
FIXME: target/hexagon: Implement hexagon_tlb_fill()
androm3da Sep 5, 2024
cc7f34f
target/hexagon: Implement siad inst
androm3da Sep 5, 2024
6853e35
target/hexagon: Implement hexagon_resume_threads()
androm3da Sep 5, 2024
6d01f83
target/hexagon: Implement setprio, resched
androm3da Sep 5, 2024
e975eea
target/hexagon: Add sysemu_ops
androm3da Sep 5, 2024
9637840
target/hexagon: Add cpu_get_phys_page_debug()
androm3da Sep 5, 2024
6734104
target/hexagon: Add vmsd
androm3da Sep 5, 2024
2449798
target/hexagon: Add exec-start-addr prop
androm3da Sep 5, 2024
278fb46
target/hexagon: Add hexagon_cpu_mmu_index()
androm3da Sep 5, 2024
81e9df9
FIXME: why remove this unreachable?
androm3da Sep 5, 2024
8c64096
FIXME: target/hexagon: handle .new values
androm3da Sep 6, 2024
6e6d18c
target/hexagon: Decode trap1, rte as COF
androm3da Sep 6, 2024
83788c9
hw/hexagon: Add machine configs for sysemu
androm3da Dec 2, 2023
e53aa53
hw/hexagon: Add support for cfgbase
SidManning Dec 18, 2024
cb8fa71
qapi: Add hexagon machine to QAPI
androm3da Oct 3, 2024
5ae396c
target/hexagon: add build config for softmmu
androm3da Dec 2, 2023
a63d405
target/hexagon: Implement hexagon_find_last_irq()
androm3da Sep 8, 2024
8618777
target/hexagon: Implement modify_ssr, resched, pending_interrupt
androm3da Sep 9, 2024
f8aace2
target/hexagon: Add pkt_ends_tb to translation
androm3da Sep 9, 2024
930face
FIXME target/hexagon: Add next_PC, {s,g}reg writes
androm3da Sep 9, 2024
d1c7a8f
target/hexagon: s/pkt_has_store/pkt_has_scalar_store
androm3da Sep 9, 2024
15620c5
target/hexagon: Add implicit sysreg writes
androm3da Sep 9, 2024
e5327e6
FIXME target/hexagon: Omit A_SCALAR_STORE from cancelled
androm3da Sep 9, 2024
93b9480
target/hexagon: Define system, guest reg names
androm3da Sep 11, 2024
5da817b
target/hexagon: initialize sys/guest reg TCGvs
androm3da Sep 11, 2024
b18c052
target/hexagon: Add TLB, k0 {un,}lock
androm3da Sep 12, 2024
bd8b913
FIXME target/hexagon: Define gen_precise_exception()
androm3da Sep 12, 2024
8311ca6
target/hexagon: Add TCG overrides for transfer insts
androm3da Sep 18, 2024
3936e70
target/hexagon: Add support for loadw_phys
androm3da Sep 18, 2024
42948d5
hw/hexagon: Add v68, sa8775-cdsp0 defs
androm3da Oct 16, 2024
c6616e6
hw/hexagon: Modify "Standalone" symbols
androm3da Oct 22, 2024
de7fdb2
hw/hexagon: Define hexagon "virt" machine
androm3da Jul 29, 2024
60238d4
target/hexagon: Add guest reg reading functionality
quic-mathbern Dec 6, 2024
0bfed88
target/hexagon: Add pcycle setting functionality
androm3da Dec 11, 2024
d1dc6f8
tests/functional: Add a hexagon minivm test
androm3da Oct 26, 2024
e9ad9f6
FIXME: target/hexagon: Add exit pattern for standalone programs
SidManning Dec 18, 2024
5e4979a
target/hexagon: Add a QTimer address prop
androm3da Jan 3, 2025
e492c72
hw/timer: Add QTimer device
SidManning Nov 8, 2023
8f1eddd
target/hexagon: Implement hexagon_read_timer()
androm3da Jan 3, 2025
8020153
FIXME: hw/hexagon: Update initialization sequence to fix l2vic interr…
SidManning Jan 3, 2025
be02452
FIXME: hw/hexagon: virt updates
androm3da Jan 10, 2025
f3d03d8
target/hexagon: review feedback ints
androm3da Jan 10, 2025
dee40ea
target/hexagon: review feedback mmu
androm3da Jan 11, 2025
fbcf2b3
fixup! hw/intc: Add l2vic interrupt controller
androm3da Jan 11, 2025
ea9749f
s/ARCH_{S,G}ET_*/arch_{s,g}et_*/
androm3da Jan 11, 2025
f8fd97b
remove unused macros
androm3da Jan 11, 2025
7134a11
fixup! target/hexagon: Add a TLB count property
androm3da Jan 11, 2025
7cdec19
review feedback: remove *written state
androm3da Jan 11, 2025
87a5629
review feedback: move funcs to hexswi.h
androm3da Jan 11, 2025
07ee0d2
review feedback: rewrite resume_threads
androm3da Jan 11, 2025
13a529b
review feedback: remove inaccurate comment
androm3da Jan 16, 2025
b80f2a0
fixup! target/hexagon: Add sysemu instructions triggering need_next_P…
androm3da Jan 16, 2025
cc0e463
Avoid the need for UNUSED attribute on decl_reg_num()
quic-mathbern Jan 16, 2025
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14 changes: 14 additions & 0 deletions .b4-config
Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
#
# Common b4 settings that can be used to send patches to QEMU upstream.
# https://b4.docs.kernel.org/
#

[b4]
send-series-to = [email protected]
send-auto-to-cmd = echo
send-auto-cc-cmd = scripts/get_maintainer.pl --noroles --norolestats --nogit --nogit-fallback
am-perpatch-check-cmd = scripts/checkpatch.pl -q --terse --no-summary --mailback -
prep-perpatch-check-cmd = scripts/checkpatch.pl -q --terse --no-summary --mailback -
searchmask = https://lore.kernel.org/qemu-devel/?x=m&t=1&q=%s
linkmask = https://lore.kernel.org/qemu-devel/%s
linktrailermask = Message-ID: <%s>
13 changes: 13 additions & 0 deletions .editorconfig
Original file line number Diff line number Diff line change
Expand Up @@ -47,3 +47,16 @@ emacs_mode = glsl
[*.json]
indent_style = space
emacs_mode = python

# by default follow QEMU's style
[*.pl]
indent_style = space
indent_size = 4
emacs_mode = perl

# but user kernel "style" for imported scripts
[scripts/{kernel-doc,get_maintainer.pl,checkpatch.pl}]
indent_style = tab
indent_size = 8
emacs_mode = perl

2 changes: 1 addition & 1 deletion .gitlab-ci.d/cirrus/freebsd-14.vars
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,6 @@ MAKE='/usr/local/bin/gmake'
NINJA='/usr/local/bin/ninja'
PACKAGING_COMMAND='pkg'
PIP3='/usr/local/bin/pip'
PKGS='alsa-lib bash bison bzip2 ca_root_nss capstone4 ccache cmocka ctags curl cyrus-sasl dbus diffutils dtc flex fusefs-libs3 gettext git glib gmake gnutls gsed gtk-vnc gtk3 json-c libepoxy libffi libgcrypt libjpeg-turbo libnfs libslirp libspice-server libssh libtasn1 llvm lzo2 meson mtools ncurses nettle ninja opencv pixman pkgconf png py311-numpy py311-pillow py311-pip py311-pyyaml py311-sphinx py311-sphinx_rtd_theme py311-tomli python3 rpm2cpio rust rust-bindgen-cli sdl2 sdl2_image snappy sndio socat spice-protocol tesseract usbredir virglrenderer vte3 xorriso zstd'
PKGS='alsa-lib bash bison bzip2 ca_root_nss capstone4 ccache4 cmocka ctags curl cyrus-sasl dbus diffutils dtc flex fusefs-libs3 gettext git glib gmake gnutls gsed gtk-vnc gtk3 json-c libepoxy libffi libgcrypt libjpeg-turbo libnfs libslirp libspice-server libssh libtasn1 llvm lzo2 meson mtools ncurses nettle ninja opencv pixman pkgconf png py311-numpy py311-pillow py311-pip py311-pyyaml py311-sphinx py311-sphinx_rtd_theme py311-tomli python3 rpm2cpio rust rust-bindgen-cli sdl2 sdl2_image snappy sndio socat spice-protocol tesseract usbredir virglrenderer vte3 xorriso zstd'
PYPI_PKGS=''
PYTHON='/usr/local/bin/python3'
36 changes: 28 additions & 8 deletions MAINTAINERS
Original file line number Diff line number Diff line change
Expand Up @@ -72,11 +72,14 @@ R: Markus Armbruster <[email protected]>
R: Philippe Mathieu-Daudé <[email protected]>
W: https://www.qemu.org/docs/master/devel/index.html
S: Odd Fixes
F: docs/devel/style.rst
F: docs/devel/build-environment.rst
F: docs/devel/code-of-conduct.rst
F: docs/devel/codebase.rst
F: docs/devel/conflict-resolution.rst
F: docs/devel/style.rst
F: docs/devel/submitting-a-patch.rst
F: docs/devel/submitting-a-pull-request.rst
F: docs/glossary.rst

Responsible Disclosure, Reporting Security Issues
-------------------------------------------------
Expand Down Expand Up @@ -229,14 +232,25 @@ Hexagon TCG CPUs
M: Brian Cain <[email protected]>
S: Supported
F: target/hexagon/
F: hw/intc/l2vic.[ch]
F: hw/hexagon/
F: hw/timer/qct-qtimer.c
F: include/hw/hexagon/
F: include/hw/timer/qct-qtimer.h
X: target/hexagon/idef-parser/
X: target/hexagon/gen_idef_parser_funcs.py
F: linux-user/hexagon/
F: tests/tcg/hexagon/
F: disas/hexagon.c
F: configs/targets/hexagon-linux-user/default.mak
F: configs/devices/hexagon-softmmu/default.mak
F: docker/dockerfiles/debian-hexagon-cross.docker
F: gdb-xml/hexagon*.xml
F: docs/system/target-hexagon.rst
F: docs/devel/hexagon-sys.rst
F: docs/devel/hexagon-vm.rst
F: docs/devel/hexagon-l2vic.rst
F: tests/functional/test_hexagon_minivm.py
T: git https://github.com/quic/qemu.git hex-next

Hexagon idef-parser
Expand Down Expand Up @@ -486,7 +500,7 @@ S: Supported
F: include/system/kvm_xen.h
F: target/i386/kvm/xen*
F: hw/i386/kvm/xen*
F: tests/avocado/kvm_xen_guest.py
F: tests/functional/test_x86_64_kvm_xen.py

Guest CPU Cores (other accelerators)
------------------------------------
Expand Down Expand Up @@ -923,7 +937,6 @@ SBSA-REF
M: Radoslaw Biernacki <[email protected]>
M: Peter Maydell <[email protected]>
R: Leif Lindholm <[email protected]>
R: Marcin Juszkiewicz <[email protected]>
L: [email protected]
S: Maintained
F: hw/arm/sbsa-ref.c
Expand Down Expand Up @@ -1203,6 +1216,7 @@ F: include/hw/pci-host/astro.h
F: include/hw/pci-host/dino.h
F: pc-bios/hppa-firmware.img
F: roms/seabios-hppa/
F: tests/functional/test_hppa_seabios.py

LoongArch Machines
------------------
Expand Down Expand Up @@ -1288,6 +1302,7 @@ F: include/hw/intc/goldfish_pic.h
F: include/hw/intc/m68k_irqc.h
F: include/hw/misc/virt_ctrl.h
F: docs/specs/virt-ctlr.rst
F: tests/functional/test_m68k_tuxrun.py

MicroBlaze Machines
-------------------
Expand Down Expand Up @@ -2785,6 +2800,13 @@ F: hw/hyperv/hv-balloon*.h
F: include/hw/hyperv/dynmem-proto.h
F: include/hw/hyperv/hv-balloon.h

ivshmem-flat
M: Gustavo Romero <[email protected]>
S: Maintained
F: hw/misc/ivshmem-flat.c
F: include/hw/misc/ivshmem-flat.h
F: docs/system/devices/ivshmem-flat.rst

Subsystems
----------
Overall Audio backends
Expand All @@ -2793,7 +2815,7 @@ M: Marc-André Lureau <[email protected]>
S: Odd Fixes
F: audio/
X: audio/alsaaudio.c
X: audio/coreaudio.c
X: audio/coreaudio.m
X: audio/dsound*
X: audio/jackaudio.c
X: audio/ossaudio.c
Expand All @@ -2815,7 +2837,7 @@ M: Philippe Mathieu-Daudé <[email protected]>
R: Christian Schoenebeck <[email protected]>
R: Akihiko Odaki <[email protected]>
S: Odd Fixes
F: audio/coreaudio.c
F: audio/coreaudio.m

DSound Audio backend
M: Gerd Hoffmann <[email protected]>
Expand Down Expand Up @@ -3703,6 +3725,7 @@ F: hw/i386/intel_iommu.c
F: hw/i386/intel_iommu_internal.h
F: include/hw/i386/intel_iommu.h
F: tests/functional/test_intel_iommu.py
F: tests/qtest/intel-iommu-test.c

AMD-Vi Emulation
S: Orphan
Expand Down Expand Up @@ -4151,7 +4174,6 @@ M: Alex Bennée <[email protected]>
T: git https://gitlab.com/stsquad/qemu testing/next
M: Philippe Mathieu-Daudé <[email protected]>
M: Thomas Huth <[email protected]>
R: Wainer dos Santos Moschetta <[email protected]>
S: Maintained
F: .github/workflows/lockdown.yml
F: .gitlab-ci.yml
Expand Down Expand Up @@ -4196,8 +4218,6 @@ F: tests/tcg/Makefile.target
Integration Testing with the Avocado framework
W: https://trello.com/b/6Qi1pxVn/avocado-qemu
R: Cleber Rosa <[email protected]>
R: Philippe Mathieu-Daudé <[email protected]>
R: Wainer dos Santos Moschetta <[email protected]>
S: Odd Fixes
F: tests/avocado/

Expand Down
15 changes: 14 additions & 1 deletion accel/tcg/cpu-exec.c
Original file line number Diff line number Diff line change
Expand Up @@ -249,7 +249,20 @@ static TranslationBlock *tb_htable_lookup(CPUState *cpu, vaddr pc,
return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
}

/* Might cause an exception, so have a longjmp destination ready */
/**
* tb_lookup:
* @cpu: CPU that will execute the returned translation block
* @pc: guest PC
* @cs_base: arch-specific value associated with translation block
* @flags: arch-specific translation block flags
* @cflags: CF_* flags
*
* Look up a translation block inside the QHT using @pc, @cs_base, @flags and
* @cflags. Uses @cpu's tb_jmp_cache. Might cause an exception, so have a
* longjmp destination ready.
*
* Returns: an existing translation block or NULL.
*/
static inline TranslationBlock *tb_lookup(CPUState *cpu, vaddr pc,
uint64_t cs_base, uint32_t flags,
uint32_t cflags)
Expand Down
1 change: 1 addition & 0 deletions accel/tcg/internal-target.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@
#include "exec/exec-all.h"
#include "exec/translation-block.h"
#include "tb-internal.h"
#include "tcg-target-mo.h"

/*
* Access to the various translations structures need to be serialised
Expand Down
8 changes: 7 additions & 1 deletion accel/tcg/tcg-all.c
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,9 @@
#include "qemu/atomic.h"
#include "qapi/qapi-builtin-visit.h"
#include "qemu/units.h"
#if !defined(CONFIG_USER_ONLY)
#if defined(CONFIG_USER_ONLY)
#include "hw/qdev-core.h"
#else
#include "hw/boards.h"
#endif
#include "internal-common.h"
Expand Down Expand Up @@ -124,6 +126,10 @@ static int tcg_init_machine(MachineState *ms)
tcg_prologue_init();
#endif

#ifdef CONFIG_USER_ONLY
qdev_create_fake_machine();
#endif

return 0;
}

Expand Down
32 changes: 21 additions & 11 deletions accel/tcg/translate-all.c
Original file line number Diff line number Diff line change
Expand Up @@ -531,23 +531,32 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
tb_reset_jump(tb, 1);
}

/*
* Insert TB into the corresponding region tree before publishing it
* through QHT. Otherwise rewinding happened in the TB might fail to
* lookup itself using host PC.
*/
tcg_tb_insert(tb);

/*
* If the TB is not associated with a physical RAM page then it must be
* a temporary one-insn TB, and we have nothing left to do. Return early
* before attempting to link to other TBs or add to the lookup table.
* a temporary one-insn TB.
*
* Such TBs must be added to region trees in order to make sure that
* restore_state_to_opc() - which on some architectures is not limited to
* rewinding, but also affects exception handling! - is called when such a
* TB causes an exception.
*
* At the same time, temporary one-insn TBs must be executed at most once,
* because subsequent reads from, e.g., I/O memory may return different
* values. So return early before attempting to link to other TBs or add
* to the QHT.
*/
if (tb_page_addr0(tb) == -1) {
assert_no_pages_locked();
return tb;
}

/*
* Insert TB into the corresponding region tree before publishing it
* through QHT. Otherwise rewinding happened in the TB might fail to
* lookup itself using host PC.
*/
tcg_tb_insert(tb);

/*
* No explicit memory barrier is required -- tb_link_page() makes the
* TB visible in a consistent state.
Expand Down Expand Up @@ -633,9 +642,10 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
* Exit the loop and potentially generate a new TB executing the
* just the I/O insns. We also limit instrumentation to memory
* operations only (which execute after completion) so we don't
* double instrument the instruction.
* double instrument the instruction. Also don't let an IRQ sneak
* in before we execute it.
*/
cpu->cflags_next_tb = curr_cflags(cpu) | CF_MEMI_ONLY | n;
cpu->cflags_next_tb = curr_cflags(cpu) | CF_MEMI_ONLY | CF_NOIRQ | n;

if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
vaddr pc = cpu->cc->get_pc(cpu);
Expand Down
3 changes: 1 addition & 2 deletions backends/cryptodev-vhost-user.c
Original file line number Diff line number Diff line change
Expand Up @@ -281,8 +281,7 @@ static int cryptodev_vhost_user_create_session(
break;

default:
error_setg(&local_error, "Unsupported opcode :%" PRIu32 "",
sess_info->op_code);
error_report("Unsupported opcode :%" PRIu32 "", sess_info->op_code);
return -VIRTIO_CRYPTO_NOTSUPP;
}

Expand Down
4 changes: 2 additions & 2 deletions backends/cryptodev.c
Original file line number Diff line number Diff line change
Expand Up @@ -97,7 +97,7 @@ static int qmp_query_cryptodev_foreach(Object *obj, void *data)
QCryptodevInfoList *qmp_query_cryptodev(Error **errp)
{
QCryptodevInfoList *list = NULL;
Object *objs = container_get(object_get_root(), "/objects");
Object *objs = object_get_container("objects");

object_child_foreach(objs, qmp_query_cryptodev_foreach, &list);

Expand Down Expand Up @@ -557,7 +557,7 @@ static void cryptodev_backend_stats_cb(StatsResultList **result,
switch (target) {
case STATS_TARGET_CRYPTODEV:
{
Object *objs = container_get(object_get_root(), "/objects");
Object *objs = object_get_container("objects");
StatsArgs stats_args;
stats_args.result.stats = result;
stats_args.names = names;
Expand Down
2 changes: 1 addition & 1 deletion bsd-user/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -628,7 +628,7 @@ int main(int argc, char **argv)
target_cpu_init(env, regs);

if (gdbstub) {
gdbserver_start(gdbstub);
gdbserver_start(gdbstub, &error_fatal);
gdb_handlesig(cpu, 0, NULL, NULL, 0);
}
cpu_loop(env);
Expand Down
2 changes: 1 addition & 1 deletion chardev/char.c
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@

Object *get_chardevs_root(void)
{
return container_get(object_get_root(), "/chardevs");
return object_get_container("chardevs");
}

static void chr_be_event(Chardev *s, QEMUChrEvent event)
Expand Down
8 changes: 8 additions & 0 deletions configs/devices/hexagon-softmmu/default.mak
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
# Default configuration for hexagon-softmmu

# Uncomment the following lines to disable these optional devices:

# Boards are selected by default, uncomment to keep out of the build.
# CONFIG_HEX_VIRT=y
# CONFIG_HEX_DSP=y
# CONFIG_L2VIC=y
7 changes: 7 additions & 0 deletions configs/targets/hexagon-softmmu.mak
Original file line number Diff line number Diff line change
@@ -0,0 +1,7 @@
# Default configuration for hexagon-softmmu

TARGET_ARCH=hexagon
TARGET_SUPPORTS_MTTCG=y
TARGET_XML_FILES=gdb-xml/hexagon-core.xml gdb-xml/hexagon-hvx.xml gdb-xml/hexagon-sys.xml
TARGET_NEED_FDT=y

21 changes: 1 addition & 20 deletions configure
Original file line number Diff line number Diff line change
Expand Up @@ -528,25 +528,6 @@ case "$cpu" in
;;
esac

# Now we have our CPU_CFLAGS we can check if we are targeting a 32 or
# 64 bit host.

check_64bit_host() {
cat > $TMPC <<EOF
#if __SIZEOF_POINTER__ != 8
#error not 64 bit system
#endif
int main(void) { return 0; }
EOF
compile_object "$1"
}

if check_64bit_host "$CPU_CFLAGS"; then
host_bits=64
else
host_bits=32
fi

if test -n "$host_arch" && {
! test -d "$source_path/linux-user/include/host/$host_arch" ||
! test -d "$source_path/common-user/host/$host_arch"; }; then
Expand Down Expand Up @@ -1072,7 +1053,7 @@ if test "$static" = "yes" ; then
fi
plugins="no"
fi
if test "$plugins" != "no" && test $host_bits -eq 64; then
if test "$plugins" != "no"; then
if has_meson_option "-Dtcg_interpreter=true"; then
plugins="no"
else
Expand Down
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