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firmware: drivers: uart: Creating uart header and source files #43
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miguelboing committed Dec 26, 2022
1 parent 815aa2f commit 4af064e
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94 changes: 94 additions & 0 deletions firmware/drivers/uart/uart.c
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#include <hal/include/libopencm3/stm32/rcc.h>
#include <hal/include/libopencm3/stm32/gpio.h>
#include <hal/include/libopencm3/stm32/usart.h>

#include "uart.h"

int uart_init(uart_config_t config)
{
uint32_t usart;
uint32_t baud;
uint32_t stopbits;
uint32_t parity;
uint32_t mode;
uint32_t bits;
uint32_t flowcontrol;

switch(config.port)
{
case UART_PORT_1: usart = USART1_BASE break;
case UART_PORT_2: usart = USART2_BASE break;
case UART_PORT_3: usart = USART3_BASE break;
case UART_PORT_4: usart = UART4_BASE break;
case UART_PORT_5: usart = UART5_BASE break;
default:
//TODO Add error log system.
break;
}


baud = (uint32_t) config.baud_rate;

switch(config.stopbits)
{
case UART_SB_0_5: stopbits = USART_STOPBITS_0_5 break;
case UART_SB_1: stopbits = USART_STOPBITS_1 break;
case UART_SB_1_5: stopbits = USART_STOPBITS_1_5 break;
case USART_STOPBITS_2: stopbits = USART_STOPBITS_2 break;
default:
//TODO Add error log system.
break;
}

switch(config.parity)
{
case UART_NO_PARITY: parity = USART_PARITY_NONE break;
case UART_ODD_PARITY: parity = USART_PARITY_ODD break;
case UART_EVEN_PARITY: parity = USART_PARITY_EVEN break;
default:
//TODO Add error log system.
break;
}

switch(config.mode)
{
case UART_MODE_TX: mode = USART_MODE_TX break;
case UART_MODE_RX: mode = USART_MODE_RX break;
case UART_MODE_TX_RX: mode = USART_MODE_TX_RX break;
default:
//TODO Add error log system.
break;
}

switch(config.world_length)
{
case UART_WL_8: bits = 8 break;
case UART_WL_9: bits = 9 break;
default:
//TODO Add error log system.
break;
}

switch(config.flow_control)
{
case UART_FC_NONE: flowcontrol = USART_FLOWCONTROL_NONE break;
case UART_FC_RTS: flowcontrol = USART_FLOWCONTROL_RTS break;
case UART_FC_CTS: flowcontrol = USART_FLOWCONTROL_CTS break;
case UART_FC_RTS_CTS: flowcontrol = USART_FLOWCONTROL_RTS_CTS break;
default:
//TODO Add error log system.
break;

}

/* Setup UART parameters. */
usart_set_baudrate(usart, baud);
usart_set_databits(usart, bits);
usart_set_stopbits(usart, stopbits);
usart_set_mode(usart, mode);
usart_set_parity(usart, parity);
usart_set_flow_control(usart, flowcontrol);

/* Enable UART. */
usart_enable(usart);
}
87 changes: 87 additions & 0 deletions firmware/drivers/uart/uart.h
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#ifndef UART_H
#define UART_H

/**
* \brief UART ports.
*/
typedef enum
{
UART_PORT_1=0, /**< UART port 1. */
UART_PORT_2, /**< UART port 2. */
UART_PORT_3, /**< UART port 3. */
UART_PORT_4, /**< UART port 4. */
UART_PORT_5 /**< UART port 5. */
} uart_ports_e;

/**
* \brief UART modes.
*/
typedef enum
{
UART_MODE_TX=0,
UART_MODE_RX,
UART_MODE_TX_RX
} uart_modes_e;

/**
* \brief Parity configuration.
*/
typedef enum
{
UART_NO_PARITY=0, /**< No parity. */
UART_ODD_PARITY, /**< Odd parity. */
UART_EVEN_PARITY /**< Even parity. */
} uart_parity_e;

/**
* \brief Stop bits configuration.
*/
typedef enum
{
UART_SB_0_5=0,
UART_SB_1,
UART_SB_1.5,
UART_SB_2
} uart_sb_e;

/**
* \brief Word length configuration.
*/
typedef enum
{
UART_WL_8=0,
UART_WL_9
} uart_wl_e;


/**
* \brief Hardware Flow Control.
*/
typedef enum
{
UART_FC_NONE=0,
UART_FC_RTS,
UART_FC_CTS,
UART_FC_RTS_CTS
} uart_fc_e;

/**
* \brief Baud rate configuration.
*/
typedef uint32_t uart_br_t;

typedef struct
{
uart_ports_e port;
uart_modes_e mode;
uart_parity_e parity;
uart_sb_e stop_bits;
uart_wl word_length;
uart_fc_e flow_control;
uart_br_t baud_rate;
} uart_config_t;

int uart_init(uart_config_t config);

#endif /* UART_H */

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