Mnemonic support & Improve Disassembler

m2isar/backends/disass/asm_formatter.py

@@ -0,0 +1,131 @@
+# SPDX-License-Identifier: Apache-2.0
+#
+# This file is part of the M2-ISA-R project: https://github.com/tum-ei-eda/M2-ISA-R
+#
+# Copyright (C) 2022
+# Chair of Electrical Design Automation
+# Technical University of Munich
+
+"""Fortmatter implementation for CoreDSL assembly strings."""
+
+# Inspired by: https://stackoverflow.com/a/9558001
+
+from string import Formatter
+
+import re
+import ast
+import operator as op
+
+operators = {ast.Add: op.add, ast.Sub: op.sub, ast.Mult: op.mul,
+			 ast.Div: op.truediv, ast.Pow: op.pow, ast.BitXor: op.xor,
+			 ast.USub: op.neg}
+
+NAMES = {
+	0: "zero",
+	1: "ra",
+	2: "sp",
+	3: "gp",
+	4: "tp",
+	5: "t0",
+	6: "t1",
+	7: "t2",
+	8: "s0",
+	9: "s1",
+	10: "a0",
+	11: "a1",
+	12: "a2",
+	13: "a3",
+	14: "a4",
+	15: "a5",
+	16: "a6",
+	17: "a7",
+	18: "s2",
+	19: "s3",
+	20: "s4",
+	21: "s5",
+	22: "s6",
+	23: "s7",
+	24: "s8",
+	25: "s9",
+	26: "s10",
+	27: "s11",
+	28: "t3",
+	29: "t4",
+	30: "t5",
+	31: "t6",
+}
+
+FNAMES = {
+	0: "f0",
+	1: "f1",
+	2: "f2",
+	3: "f3",
+	4: "f4",
+	5: "f5",
+	6: "f6",
+	7: "f7",
+	8: "fs0",
+	9: "fs1",
+	10: "fa0",
+	11: "fa1",
+	12: "fa2",
+	13: "fa3",
+	14: "fa4",
+	15: "fa5",
+	16: "fa6",
+	17: "fa7",
+	18: "fs2",
+	19: "fs3",
+	20: "fs4",
+	21: "fs5",
+	22: "fs6",
+	23: "fs7",
+	24: "fs8",
+	25: "fs9",
+	26: "fs10",
+	27: "fs11",
+	28: "ft8",
+	29: "ft9",
+	30: "ft10",
+	31: "ft11",
+}
+
+class AsmFormatter(Formatter):
+
+	def get_value(self, key, args, kwargs):
+		if isinstance(key, int):
+			return key
+		assert isinstance(key, str)
+		try:
+			value = self.eval_expr(key, args, kwargs)
+			return value
+		except ValueError:
+			pass
+
+		return super().get_value(key, args, kwargs)
+
+	def get_field(self, field_name, args, kwargs):
+		return super().get_field(field_name, args, kwargs)
+
+	def eval_expr(self, expr, args, kwargs):
+		return self.eval_(ast.parse(expr, mode='eval').body, args, kwargs)
+
+	def eval_(self, node, args, kwargs):
+		if isinstance(node, ast.Num): # <number>
+			return node.n
+		elif isinstance(node, ast.Name): # <name>
+			return super().get_value(node.id, args, kwargs)
+		elif isinstance(node, ast.BinOp): # <left> <operator> <right>
+			return operators[type(node.op)](self.eval_(node.left, args, kwargs), self.eval_(node.right, args, kwargs))
+		elif isinstance(node, ast.UnaryOp): # <operator> <operand> e.g., -1
+			return operators[type(node.op)](self.eval_(node.operand, args, kwargs))
+		elif isinstance(node, ast.Call):
+			if node.func.id == "name":
+				assert len(node.args) == 1
+				return NAMES[self.eval_(node.args[0], args, kwargs)]
+			if node.func.id == "fname":
+				assert len(node.args) == 1
+				return FNAMES[self.eval_(node.args[0], args, kwargs)]
+			assert False
+		else:
+			raise TypeError(node)

m2isar/backends/disass/disass.py

@@ -18,6 +18,7 @@
 from io import SEEK_CUR
 
 from ...metamodel import arch
+from .asm_formatter import AsmFormatter
 
 logger = logging.getLogger("viewer")
 
@@ -68,6 +69,7 @@ def main():
 	parser.add_argument('top_level', help="A .m2isarmodel file containing the models to generate.")
 	parser.add_argument("core_name")
 	parser.add_argument('bin')
+	parser.add_argument("--format", action="store_true", help="Use assembly formatting string and mnemonic")
 	parser.add_argument("--log", default="info", choices=["critical", "error", "warning", "info", "debug"])
 	args = parser.parse_args()
 
@@ -111,6 +113,8 @@ def main():
 
 	instrs_by_size = dict(sorted(instrs_by_size.items()))
 
+	prev_count = 0
+
 	with open(args.bin, "rb") as f:
 		# read at most XLEN bytes at a time
 		while iw_read := f.peek(readlen):
@@ -129,11 +133,36 @@ def main():
 				ins_str = "unknown"
 				step = steplen
 
+				if prev_count > 2:
+					print(f"\trepeated {prev_count-2} times.")
+				prev_count = 0
+
 			# decode instruction operands
 			else:
+				if found_ins and found_ins.name == "DII":
+					prev_count += 1
+					if prev_count > 1:
+						bla = f.tell()
+						f.seek(step, SEEK_CUR)
+						continue
+				else:
+					if prev_count > 2:
+						print(f"\trepeated {prev_count-2} times.")
+					prev_count = 0
+
 				operands = decode(ii, found_ins)
-				op_str = " | ".join([f"{k}={v}" for k, v in operands.items()])
-				ins_str = f"{found_ins.name} [{op_str}]"
+				if args.format:
+					asm_name = found_ins.mnemonic
+					assembly = found_ins.assembly
+					fmt = AsmFormatter()
+					if assembly is None:
+						assembly = ""
+					asm_args = fmt.format(assembly, **operands)
+				else:
+					asm_name = found_ins.name
+					op_str = " | ".join([f"{k}={v}" for k, v in operands.items()])
+					asm_args = f"[{op_str}]"
+				ins_str = f"{asm_name}\t{asm_args}"
 				step = found_ins.size // 8
 
 			# print decoded instruction mnemonic

m2isar/backends/etiss/architecture_writer.py

@@ -190,7 +190,7 @@ def write_arch_specific_cpp(core: arch.CoreDef, start_time: str, output_path: pa
 	if error_fn is not None:
 		for bitsize in core.instr_classes:
 			error_bitfield = arch.BitField("error_code", arch.RangeSpec(31, 0), arch.DataType.U)
-			error_instr = arch.Instruction(f"trap_entry {bitsize}", {arch.InstrAttribute.NO_CONT: None}, [error_bitfield], "", None)
+			error_instr = arch.Instruction(f"trap_entry {bitsize}", {arch.InstrAttribute.NO_CONT: None}, [error_bitfield], "", "", None)
 			error_bitfield_descr = error_instr.fields.get("error_code")
 			error_op = behav.Operation([
 				behav.ProcedureCall(error_fn, [behav.NamedReference(error_bitfield_descr)])

m2isar/backends/viewer/viewer.py

@@ -179,7 +179,7 @@ def main():
 						enc_str.append(f"{enc.name}[{enc.range.upper}:{enc.range.lower}]")
 
 				tree.insert(instr_id, tk.END, text="Encoding", values=(" ".join(enc_str),))
-				tree.insert(instr_id, tk.END, text="Assembly", values=(instr_def.disass,))
+				tree.insert(instr_id, tk.END, text="Assembly", values=(instr_def.assembly,))
 				tree.insert(instr_id, tk.END, text="Throws", values=(instr_def.throws))
 				attrs_id = tree.insert(instr_id, tk.END, text="Attributes")
 

m2isar/frontends/coredsl2/CoreDSL2.g4

@@ -36,7 +36,7 @@ always_block
 instruction
 	: name=IDENTIFIER attributes+=attribute* '{'
 	'encoding' ':' encoding+=encoding_entry ('::' encoding+=encoding_entry)*';'
-	(('args_disass' | 'assembly') ':' disass=STRING ';')?
+	('assembly' ':' (assembly=STRING | '{' mnemonic=STRING ',' assembly=STRING '}') ';')?
 	'behavior' ':' behavior=statement
 	'}'
 	;

m2isar/frontends/coredsl2/architecture_model_builder.py

@@ -164,9 +164,10 @@ def visitInstruction(self, ctx: CoreDSL2Parser.InstructionContext):
 		# read encoding, attributes and disassembly
 		encoding = [self.visit(obj) for obj in ctx.encoding]
 		attributes = dict([self.visit(obj) for obj in ctx.attributes])
-		disass = ctx.disass.text if ctx.disass is not None else None
+		assembly = ctx.assembly.text.replace("\"", "") if ctx.assembly is not None else None
+		mnemonic = ctx.mnemonic.text.replace("\"", "") if ctx.mnemonic is not None else None
 
-		i = arch.Instruction(ctx.name.text, attributes, encoding, disass, ctx.behavior)
+		i = arch.Instruction(ctx.name.text, attributes, encoding, mnemonic, assembly, ctx.behavior)
 		self._instr_classes.add(i.size)
 
 		instr_id = (i.code, i.mask)